Keyphrases
Matrix multiplier
100%
Field Programmable Gate Arrays
55%
Interpolator
55%
Truncated multiplier
42%
Truncated Squarer
39%
Hardware Accelerator
36%
Hardware Implementation
36%
Elementary Functions
36%
Two's Complement
33%
Operand
30%
Computational Error
29%
Significand
26%
Reduction in Area
24%
Embedded multiplier
24%
Xilinx
24%
Array multiplier
24%
Accurate Simulation
24%
32-bit
24%
Partial Product Generator
23%
Function Approximation
21%
Limited Area
19%
Design Alternatives
18%
Software Framework
18%
Analog Output
18%
Ergonomic Design
18%
High-throughput
18%
Programmable Logic Controller
18%
Constant multiplier
18%
Low Power
18%
Significant Bits
18%
Combinational Logic
18%
Reduction Error
18%
FIR Filter Design
18%
Accelerated Simulation
18%
School Community
18%
Software Architecture
18%
Array-based
18%
Design Skills
18%
Digital Human Modeling
18%
Chebyshev
18%
Undergraduate Students
18%
Exploration Tool
18%
Finite Impulse Response Filters
18%
Design Space Exploration
18%
Sum of Squares
18%
Discrete Cosine Transform
18%
Power Discrete
18%
Computer-aided Design
18%
Arithmetic Logic Unit
18%
Linear Quadratic
18%
Computer Science
Table Lookup
83%
Signal Processing System
36%
Finite Impulse Response Filter
36%
Undergraduate Student
36%
Hardware Accelerator
36%
Hardware Implementation
36%
Elementary Function
36%
Partial Product
29%
Coefficient Value
27%
Control Signal
21%
Case Study
18%
Combinational Logic
18%
Constant Multiple
18%
Shifters
18%
Programmable Logic Controller
18%
Reconstructed Image
18%
Software Architecture
18%
Design Alternative
18%
Point Multiplication
18%
High Throughput
18%
Design-Space Exploration
18%
Correction Method
18%
Digital Signal Processing
18%
Signal Processing Application
18%
Discrete Cosine Transform
18%
Double Precision
18%
Approximation (Algorithm)
18%
Learning Experiences
13%
Truncation Error
9%
Quantitative Data
9%
Teaching and Learning
9%
Matrix Multiplication
9%
Unsigned Multiplier
9%
Qualitative Data
9%
Simulation Experiment
9%
Software Development Tool
9%
Process Improvement
9%
Searching Algorithm
9%
Production Efficiency
7%
Exhaustive Application
6%
Image Compression
6%
Graphical User Interface
6%
Production Line
5%
Engineering
Maximum Absolute Error
64%
Hardware Accelerator
55%
Design Specification
36%
Finite Impulse Response Filter
36%
Field Programmable Gate Arrays
36%
Design Space
30%
Accurate Simulation
24%
Signal Processing System
24%
Rounding Error
18%
Reconstructed Image
18%
Adders
18%
Decompression
18%
Design Alternative
18%
Ergonomic Design
18%
FIR Filter
18%
Ergonomics
18%
Area Estimate
18%
Power Estimate
18%
Square Root
18%
Lookup Table
18%
Elementary Function
18%
Analog Input
12%
Error Correction
12%
Purpose Processor
9%
Digital Signal Processor
9%
Matrix Multiplication
9%
Product Design
9%
Graphical User Interface
9%
Processed Image
9%
Truncation
9%
Search Algorithm
9%
Double Precision
9%
Testing Time
6%
Simulation Time
6%
Filter Coefficient
6%
Integrated Information System
6%
Input Signal
6%
