Project Details
Description
This proposal seeks to address these two primary challenges by developing adaptive software tools to
co-manage quality-performance-power tradeoffs. First, we will develop combinatorial and statistical adaptive techniques to select methods dynamically, delivering the improved performance while producing a solution that meets application quality requirements. Next, using an annotated model of computation and communication costs and sparse data access patterns, we will develop techniques for power reduction without
performance impairment. For example, power savings can be significant even when relatively minor load
imbalances among processors are exploited. These imbalances can easily be on the order of trillions of
CPU cycles, and power consumption can be tuned through dynamic voltage scaling (DVS, where both the
clock frequency and the supply voltage are tuned) for lightly/heavily loaded processors. More importantly,
resulting insights can lead to future systems where the power budget is directed effectively over processor-memory interconnect subsystems to improve application performance. We plan to implement our techniques by developing an adaptive component software system on high-end multiprocessors
Status | Finished |
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Effective start/end date | 9/15/04 → 8/31/09 |
Funding
- National Science Foundation: $905,706.00