The 21st century promises to thrive on novel electronic systems that consume power so frugally that even ambient energy harvesting can supply all of their needs. Conventional silicon-based CMOS technology, despite having repeatedly revolutionized our everyday life for the last four decades, appears incapable of delivering on this objective due to fundamental limitations in the underlying physics of MOSFETs. The goal of this project is, therefore, to execute innovation at all levels: from materials engineering to device physics to circuit design to architectural implementations in order to achieve electronic systems that simultaneously offer energy efficiency and high performance. These systems can then be used for implantable medical devices, flexible electronic appliances, self-powered remote sensors and also for various devices involved in the Internet-of-Things and so on. Scientific and technological successes, however, will not be effectively leveraged unless disseminated to all sections of society. Educational out-reach will, therefore, be an integral part of this project to transmit the knowledge generated to undergraduates, graduates and under-represented groups in order to have real and lasting impact. The PIs will organize workshops and seminars, develop course materials and establish educational collaborations with instructors from community colleges and 4-year universities to disseminate the research results.
From technical stand point, this project aims to experimentally realize a novel, steep slope, aggressively scalable and energy efficient transistor based on dynamic band structure engineering in two-dimensional (2D) materials, and to exploit the unique characteristics of the proposed device to enable ultra-low power circuits and architectures. The 2D materials are layered compounds with strong intra-layer covalent interaction and weak van der Waals inter-layer interaction. This transistor, referred to as the two-dimensional electrostrictive field effect transistor (2D-EFET) works on the principle of voltage induced strain transduction. It uses an electrostrictive material as a gate oxide that expands in response to an applied gate bias and thereby, transduces an out-of-plane stress on the 2D channel material. This stress reduces the inter-layer distance between the consecutive layers of the semiconducting 2D material and dynamically reduces its bandgap to zero i.e. converts it into a semi-metal. Thus the device operates with a large bandgap in the OFF state and a small or zero bandgap in the ON state. As a consequence of this transduction mechanism, internal voltage amplification takes place which results in steep switching. The steep switching enables aggressive voltage scaling, which, with proper device-circuit co-design, leads to ultra-low power and robust circuit operation. These properties are very attractive for both highly parallel throughput-oriented architectures and inherently low-voltage designs, such as IoT nodes powered by energy harvesting, thereby addressing needs across both ends of the computing spectrum. The expected gain in energy efficiency from adopting 2D-EFETs as a standard element of the circuit and architecture designer?s toolkit is found to be large enough, for some domains, to be transformative.
|Effective start/end date
|10/1/16 → 9/30/20
- National Science Foundation: $399,999.00