EMT/NANO: Co-Exploration of Device and System Architecture for Quantum NanoElectronics

Project: Research project

Project Details


Project Summary

Objectives: The objective of our proposal is co-exploration of simulation and design of single or few electron nanoscale quantum devices into binary decision diagram based reconfigurable logic architectures for realization of robust, ultra-low power computing systems. The approach is based on split-gate quantum nanodots as the decision node elements while incorporating functional reconfigurability. This research will primarily focus on the device architecture design to demonstrate its viability in realizing logic architectures with sufficient logic depth, functional robustnesss, and energy delay product approaching the quantum limit.

Intellectual merit: Key contributions expected from this research are: 1) Simultaneous design and optimization of nanoscale quantum devices to implement system level logic architecture operating with record power-delay product approaching the quantum limit of kT/q*ln(2) 2) Detailed quantum simulations of single and cascaded devices to facilitate design of reconfigurable BDD-based logic circuits for achieving reliable ultra low power operation. The proposed research is transformative since it will expand our fundamental understanding of physics and operation of compound semiconductor based nanodevices in restricted geometries in novel multiple gate configurations, as well as design and implementation of energy efficient reconfigurable BDD logic architectures.

Broader Impact: The results from this research will foster new directions at the intersection of material science, electrical engineering and computer engineering extending mesoscopic devices to logic architectures. The proposed research directly addresses the ongoing quest in the semiconductor industry for longer term solutions to energy efficient technology scaling. Undergraduate and graduate students, involved in this research, will get versatile training in cross-disciplinary areas in preparation of their careers in the burgeoning nanoelectronics industry. The device models, nanofabrication techniques and design methodologies developed will be used in creating courseware which will be available through our website for use by other educators, researchers and industrial practitioners.

Effective start/end date9/1/088/31/12


  • National Science Foundation: $200,020.00


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