Project Details
Description
With the increasing importance of portable, mobile systems, power consumption has been elevated to be a critical design parameter. Concern over power dissipation is also important for performance-driven designs where power may soon displace chip area as the principal design constraint. This is the motivation for this project, which focuses on the design of low-power, high-performance processors, particularly those customized for use in a mobile environment. Advances are sought in architecture, software, and applications. Activities in the architecture area include the design and characterization of low-power data path functional units, the design of low-power control logic, the design of low- power on-chip caches, and the derivation and quantification of a set of strategies for designing low-power microarchitectures. The software and applications areas will include a study of the effects of compiler optimization techniques, algorithms, and data structures on power consumption of code running on candidate architectures.
Status | Finished |
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Effective start/end date | 7/1/97 → 6/30/01 |
Funding
- National Science Foundation: $325,385.00