XPS: FULL: A Fresh Look at Near Data Computing: Coordinated Data and Computation Government

Many important computer applications in our daily lives depend on processing large amounts of data. While moving data from storage devices to processing components can be very time consuming, with increasing core counts and emerging applications, moving data within a computer system can also incur significant latencies, thereby hurting application performance and energy efficiency. Unfortunately, existing solutions to minimize this data movement overhead have limited potential. Thus, it has become essential to explore a holistic approach for minimizing data movements, and shifting from the compute-centric model being used today to a data-centric or near-data computing (NDC) model for effectively handling the data processing needs of different classes of applications. The PIs aim to integrate their research on NDC with the educational activities and student training at Penn State for nurturing the future workforce in science and engineering. The outreach activities include engaging undergraduates in the NDC research, and working with the CSATS (Center for Science and the Schools) and VIEW (Visit In Engineering Weekend) programs at Penn State to get involved with the ongoing STEM-oriented K-12 activities.

This project aims to revisit the near-data computing concept from a fresh perspective by undertaking a cross-layer approach for exploring the potential benefits of moving computation closer to data. Thus, instead of considering only the Boolean extremes of near-data computing in the hardware of processor core vs. the DRAM (as in the case of past attempts), this project explores a rich spectrum of possibilities between these two. Specifically, focusing on emerging multicore systems and multithreaded applications from three important application domains (high performance computing, embedded/mobile computing, and datacenter computing), this research tries to address the 'where', 'when', 'what', and 'how' questions of near-data computing in the context of deep memory hierarchies. This comprehensive approach to moving computation closer to the data aims to break the memory wall, which is the biggest barrier to the scalability of emerging chip multiprocessors.