A Bayesian Framework for Optimizing Interconnects in High-Speed Channels

Hakki M. Torun, Mourad Larbi, Madhavan Swaminathan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Scopus citations

Abstract

Increasing demand in higher bandwidth chip-to chip communications have resulted in challenges related to modelling and optimization of their electrical performance due to CPU intensive simulations arising from multiscale structures. Conventional approaches use various approximations to either reduce the design complexity or reduce the simulation time, however, this can lead to inaccurate models and sub-optimal designs. In this paper, we address this problem by using machine learning based techniques and propose a Bayesian framework to model and optimize interconnects in high-speed channels in an accurate yet efficient fashion.

Original languageEnglish (US)
Title of host publication2018 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization, NEMO 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538652046
DOIs
StatePublished - Oct 23 2018
Event2018 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization, NEMO 2018 - Reykjavik, Iceland
Duration: Aug 8 2018Aug 10 2018

Publication series

Name2018 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization, NEMO 2018

Conference

Conference2018 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization, NEMO 2018
Country/TerritoryIceland
CityReykjavik
Period8/8/188/10/18

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Control and Optimization
  • Modeling and Simulation
  • Computational Mathematics

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