Abstract
This article proposes a bit-time-dependent behavioral model of input-output (I/O) drivers for overclocking simulation. The driver behavior under overclocking conditions is investigated, and the corresponding weighting function response surface is demonstrated. In contrast to the previous approaches that use fixed timing signals extracted under normal operating conditions only, the proposed model addresses the modeling of overclocking behavior by using bit-time-dependent weighting functions (BTDWFs) along with a transition variable. The weighting coefficients can be generated appropriately for different overclocking scenarios. The corresponding model extraction flow is presented. Using the proposed BTDWFs, the driver input signal is processed during run-time by a finite state machine (FSM) algorithm which can be implemented in the widely supported hardware description languages such as Verilog-A. The proposed model is able to capture the driver's behavior accurately under both normal operation and overclocking conditions. Its fidelity and simulation speedup are validated with modeling examples using commercial driver circuit.
Original language | English (US) |
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Article number | 9102450 |
Pages (from-to) | 1630-1637 |
Number of pages | 8 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 28 |
Issue number | 7 |
DOIs | |
State | Published - Jul 2020 |
All Science Journal Classification (ASJC) codes
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering