A crosstalk aware interconnect with variable cycle transmission

Keyphrases

• Performance Improvement 100%
• Variable Cycle 100%
• Crosstalk-aware 100%
• Data Dependency 50%
• Number of Cycles 50%
• Microprocessor 50%
• Performance Penalty 50%
• Area-efficient 50%
• Sender 50%
• On-chip Bus 50%
• Data Pattern 50%
• Transmission Mechanism 50%
• Capacitive Coupling 50%
• Pessimistic Approach 50%
• Code Optimization 50%
• Worst-case Crosstalk 50%
• Crosstalk Delay 50%
• Reduction Scheme 50%

Computer Science

• Experimental Result 100%
• Performance Penalty 100%
• Crosstalk Reduction 100%
• Microprocessor 100%