A dual-V_DD low power FPGA architecture

Keyphrases

• Power Saving 100%
• Supply Voltage 100%
• FPGA Architecture 100%
• Minimal Impact 50%
• Power Consumption 50%
• Time Constraints 50%
• Average Power 50%
• Energy Consumption Reduction 50%
• Design Considerations 50%
• Impact Performance 50%
• Assignment Algorithm 50%
• Logic Block 50%
• Low VDD 50%

Computer Science

• Critical Path 100%
• Field Programmable Gate Arrays 100%
• Supply Voltage 66%
• Experimental Result 33%
• Power Consumption 33%
• Design Consideration 33%
• Reduce Power Consumption 33%
• Timing Constraint 33%