TY - GEN
T1 - A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications
AU - Heo, Unsuk
AU - Li, Xueqing
AU - Liu, Huichu
AU - Gupta, Sumeet
AU - Datta, Suman
AU - Narayanan, Vijaykrishnan
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/2/4
Y1 - 2015/2/4
N2 - This paper presents a high-efficiency switched capacitance charge pump in 20 nm III-V heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage applications. The steep-slope and low-threshold HTFET device characteristics are utilized to extend the input voltage range to below 0.20 V. Meanwhile, the uni-directional current conduction is utilized to reduce the reverse energy loss and to simplify the non-overlapping phase controlling. Furthermore, with unidirectional current conduction, an improved cross-coupled charge pump topology is proposed for higher voltage output and PCE. Simulation results show that the proposed HTFET charge pump with a 1.0 kΩ resistive load achieves 90.4% and 91.4% power conversion efficiency, and 0.37 V and 0.57 V DC output voltage, when the input voltage is 0.20 V and 0.30 V, respectively.
AB - This paper presents a high-efficiency switched capacitance charge pump in 20 nm III-V heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage applications. The steep-slope and low-threshold HTFET device characteristics are utilized to extend the input voltage range to below 0.20 V. Meanwhile, the uni-directional current conduction is utilized to reduce the reverse energy loss and to simplify the non-overlapping phase controlling. Furthermore, with unidirectional current conduction, an improved cross-coupled charge pump topology is proposed for higher voltage output and PCE. Simulation results show that the proposed HTFET charge pump with a 1.0 kΩ resistive load achieves 90.4% and 91.4% power conversion efficiency, and 0.37 V and 0.57 V DC output voltage, when the input voltage is 0.20 V and 0.30 V, respectively.
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U2 - 10.1109/VLSID.2015.58
DO - 10.1109/VLSID.2015.58
M3 - Conference contribution
AN - SCOPUS:84938280526
T3 - Proceedings of the IEEE International Conference on VLSI Design
SP - 304
EP - 309
BT - Proceedings of the 28th International Conference on VLSI Design, VLSID 2015 - held concurrently with the 14th International Conference on Embedded Systems
PB - IEEE Computer Society
T2 - 28th International Conference on VLSI Design, VLSID 2015 - held concurrently with the 14th International Conference on Embedded Systems
Y2 - 3 January 2015 through 7 January 2015
ER -