Abstract
A hybrid digital filter structure is presented that combines a combinatorial multiplication technique with a residue number architecture. The hybrid technique eliminates general multiplication and results in a parallel structure inherent in the residue number system. Results indicate that better speed/cost ratios can be obtained with the hybrid architecture than with either structure alone for applications in which high performance is a predominant factor.
Original language | English (US) |
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Pages (from-to) | 700-702 |
Number of pages | 3 |
Journal | Proceedings of the IEEE |
Volume | 66 |
Issue number | 6 |
DOIs | |
State | Published - Jun 1978 |
All Science Journal Classification (ASJC) codes
- General Computer Science
- Electrical and Electronic Engineering