TY - GEN
T1 - A hybrid NoC design for cache coherence optimization for chip multiprocessors
AU - Zhao, Hui
AU - Jang, Ohyoung
AU - Ding, Wei
AU - Zhang, Yuanrui
AU - Kandemir, Mahmut
AU - Irwin, Mary Jane
PY - 2012
Y1 - 2012
N2 - On chip many-core systems, evolving from prior multi-processor systems, are considered as a promising solution to the performance scalability and power consumption problems. The long communication distance between the traditional multi-processors makes directory-based cache coherence protocols better solutions compared to bus-based snooping protocols even with the overheads from indirections. However, much smaller distances between the CMP cores enhance the reachability of buses, revitalizing the applicability of snooping protocols for cache-to-cache transfers. In this work, we propose a hybrid NoC design to provide optimized support for cache coherency. In our design, on-chip links can be dynamically configured as either point-to-point links between NoC nodes or short buses to facilitate localized snooping. By taking advantage of the best of both worlds, bus-based snooping coherency and NoC-based directory coherency, our approach brings both power and performance benefits.
AB - On chip many-core systems, evolving from prior multi-processor systems, are considered as a promising solution to the performance scalability and power consumption problems. The long communication distance between the traditional multi-processors makes directory-based cache coherence protocols better solutions compared to bus-based snooping protocols even with the overheads from indirections. However, much smaller distances between the CMP cores enhance the reachability of buses, revitalizing the applicability of snooping protocols for cache-to-cache transfers. In this work, we propose a hybrid NoC design to provide optimized support for cache coherency. In our design, on-chip links can be dynamically configured as either point-to-point links between NoC nodes or short buses to facilitate localized snooping. By taking advantage of the best of both worlds, bus-based snooping coherency and NoC-based directory coherency, our approach brings both power and performance benefits.
UR - http://www.scopus.com/inward/record.url?scp=84863546135&partnerID=8YFLogxK
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U2 - 10.1145/2228360.2228511
DO - 10.1145/2228360.2228511
M3 - Conference contribution
AN - SCOPUS:84863546135
SN - 9781450311991
T3 - Proceedings - Design Automation Conference
SP - 834
EP - 842
BT - Proceedings of the 49th Annual Design Automation Conference, DAC '12
T2 - 49th Annual Design Automation Conference, DAC '12
Y2 - 3 June 2012 through 7 June 2012
ER -