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A Large Window Nonvolatile Transistor Memory for High-Density and Low-Power Vertical NAND Storage Enabled by Ferroelectric Charge Pumping

  • Zijian Zhao
  • , Yixin Qin
  • , Jiahui Duan
  • , Yushan Lee
  • , Suhwan Lim
  • , Kijoon Kim
  • , Kwangsoo Kim
  • , Wanki Kim
  • , Daewon Ha
  • , Vijaykrishnan Narayanan
  • , Kai Ni

Research output: Contribution to journalArticlepeer-review

Abstract

In this work, we have developed a large memory window (MW) ferroelectric field effect transistor (FeFET) memory for vertical NAND storage. We demonstrate that: 1) by inserting a top functional layer above the ferroelectric, gate side injection pumped by ferroelectric switching event can be enhanced, thus increasing the MW; 2) inspired by the charge trap flash, SiNX is chosen as the charge trapping layer and the proposed structures have been experimentally demonstrated to effectively increase MW; 3) the MIFIS structure demonstrates a 6V-8V MW for 11V 1μ s write pulse and 8V-12V window for 15V 1μs with a SiOX composite functional layer; 4) interestingly, the MIFIS device shows immediate read-after-write capability, which is not observed in the baseline FeFET, suggesting minor channel side injection and relaxation.

Original languageEnglish (US)
Pages (from-to)2554-2556
Number of pages3
JournalIEEE Electron Device Letters
Volume45
Issue number12
DOIs
StatePublished - 2024

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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