TY - JOUR
T1 - A Low-Loss Passive D-Band Phase Shifter for Calibration-Free, Precise Phase Control
AU - Abbasi, Mohammadreza
AU - Lee, Wooram
N1 - Publisher Copyright:
© 1966-2012 IEEE.
PY - 2024/5/1
Y1 - 2024/5/1
N2 - A low-loss passive phase shifter is presented for calibration-free, precise phase control at D -band. The proposed topology manipulates time delay by controlling propagation distance in a trombone-like structure formed with two parallel transmission lines periodically connected via switch networks. The proposed phase control exploits only one switched signal transition for all phase states, significantly lowering insertion loss and keeping loss variation small over phase states. A detailed analysis of the design tradeoff between insertion loss and phase resolution is also presented. A prototype 5-bit digital phase shifter that operates with 11.25° steps over 360° tuning range at 140 GHz was implemented using a 45-nm RF silicon-on-insulator (SOI) technology and occupies only 0.04 text {mm}{2}. On-wafer measurements report an rms phase error of 1.2° without calibration, which is the lowest among published phase shifters in similar frequency bands. The prototype IC achieved the measured insertion loss of 11.5 ± 0.8 dB and IP1dB of >12.9 dBm with no dc power consumption.
AB - A low-loss passive phase shifter is presented for calibration-free, precise phase control at D -band. The proposed topology manipulates time delay by controlling propagation distance in a trombone-like structure formed with two parallel transmission lines periodically connected via switch networks. The proposed phase control exploits only one switched signal transition for all phase states, significantly lowering insertion loss and keeping loss variation small over phase states. A detailed analysis of the design tradeoff between insertion loss and phase resolution is also presented. A prototype 5-bit digital phase shifter that operates with 11.25° steps over 360° tuning range at 140 GHz was implemented using a 45-nm RF silicon-on-insulator (SOI) technology and occupies only 0.04 text {mm}{2}. On-wafer measurements report an rms phase error of 1.2° without calibration, which is the lowest among published phase shifters in similar frequency bands. The prototype IC achieved the measured insertion loss of 11.5 ± 0.8 dB and IP1dB of >12.9 dBm with no dc power consumption.
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U2 - 10.1109/JSSC.2024.3357738
DO - 10.1109/JSSC.2024.3357738
M3 - Article
AN - SCOPUS:85184818554
SN - 0018-9200
VL - 59
SP - 1371
EP - 1380
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 5
ER -