A micro-grained VLSI signal processor

Mary Jane Irwin, Robert Michael Owens

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Scopus citations


In this paper we descrilx; a new. very fine grain, VLSI processor. Very fine grain VLSI processors arc cspccially suited for problems with a high degree of parallelism. However, to maintain their fine grainness (i.e., small size) most fine grain processors arc relatively inflexible. Attempts to increase flexibility usually increase processor complexity and. thereby, decreases grainness. Our two-dimensional, micro- grained processor maintains both a high degree of flexibility and fine grainness by reducing each processing cell to a small RAM and several multiplexers. For even greater speed, arithmetic operations arc based on a redundant number representation. Algorithms for SIMD, mesh architectures can be easily adapted for our micro-grained processor. This is particularly true for algorithms for certain two-dimensional signal and image processing problems.

Original languageEnglish (US)
Title of host publicationICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)0780305329
StatePublished - 1992
Event1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1992 - San Francisco, United States
Duration: Mar 23 1992Mar 26 1992

Publication series

NameICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
ISSN (Print)1520-6149


Other1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1992
Country/TerritoryUnited States
CitySan Francisco

All Science Journal Classification (ASJC) codes

  • Software
  • Signal Processing
  • Electrical and Electronic Engineering


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