TY - GEN
T1 - A model design of a 2560-channel neural spike detection platform
AU - Elaraby, Nashwa
AU - Obeid, Iyad
PY - 2012
Y1 - 2012
N2 - A model design of a 2560-channel neural signal processing platform is presented. The design carries out spike detection over a large reconfigurable number of channels on Field Programmable Gate Arrays (FPGAs), and integrates the application of high-speed serial transceivers to allow for the required massive input data transmissions.
AB - A model design of a 2560-channel neural signal processing platform is presented. The design carries out spike detection over a large reconfigurable number of channels on Field Programmable Gate Arrays (FPGAs), and integrates the application of high-speed serial transceivers to allow for the required massive input data transmissions.
UR - http://www.scopus.com/inward/record.url?scp=84874150853&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84874150853&partnerID=8YFLogxK
U2 - 10.1109/ReConFig.2012.6416762
DO - 10.1109/ReConFig.2012.6416762
M3 - Conference contribution
AN - SCOPUS:84874150853
SN - 9781467329217
T3 - 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012
BT - 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012
T2 - 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012
Y2 - 5 December 2012 through 7 December 2012
ER -