TY - GEN
T1 - A Nonlinear Behavioral Modeling Approach for Voltage-controlled Oscillators Using Augmented Neural Networks
AU - Yu, Huan
AU - Swaminathan, Madhavan
AU - Ji, Chuanyi
AU - White, David
N1 - Funding Information:
This material is based upon work supported by the National Science Foundation under Grant No. CNS 16-24810 - Center for Advanced Electronics through Machine Learning (CAEML).
Publisher Copyright:
© 2018 IEEE.
PY - 2018/8/17
Y1 - 2018/8/17
N2 - This paper describes a method to model the nonlinear time-domain steady-state behavior of voltage-controlled oscillators (VCOs) using augmented neural networks. In the proposed method, a feed forward neural network (FFNN) with a periodic unit is used to capture the periodicity of the oscillatory output waveform. Inside the periodic unit, a second FFNN is used to map the control voltage to the instantaneous frequency. As opposed to the state space model which is based on a system of differential equations, the output of the oscillator is generated explicitly using the neural network presented in this paper. The model is trained using the data obtained from the simulation of transistor-level circuit models. The fidelity and speed-up of the model is demonstrated by an example of a transistor-level VCO. The proposed model is compatible with Verilog-A.
AB - This paper describes a method to model the nonlinear time-domain steady-state behavior of voltage-controlled oscillators (VCOs) using augmented neural networks. In the proposed method, a feed forward neural network (FFNN) with a periodic unit is used to capture the periodicity of the oscillatory output waveform. Inside the periodic unit, a second FFNN is used to map the control voltage to the instantaneous frequency. As opposed to the state space model which is based on a system of differential equations, the output of the oscillator is generated explicitly using the neural network presented in this paper. The model is trained using the data obtained from the simulation of transistor-level circuit models. The fidelity and speed-up of the model is demonstrated by an example of a transistor-level VCO. The proposed model is compatible with Verilog-A.
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U2 - 10.1109/MWSYM.2018.8439324
DO - 10.1109/MWSYM.2018.8439324
M3 - Conference contribution
AN - SCOPUS:85053053621
SN - 9781538650677
T3 - IEEE MTT-S International Microwave Symposium Digest
SP - 551
EP - 554
BT - Proceedings of the 2018 IEEE/MTT-S International Microwave Symposium, IMS 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 IEEE/MTT-S International Microwave Symposium, IMS 2018
Y2 - 10 June 2018 through 15 June 2018
ER -