A nonlinear lattice for high-amplitude picosecond pulse generation in CMOS

Wooram Lee; Muhammad Adnan; Omeed Momeni; Ehsan Afshari

doi:10.1109/TMTT.2011.2178255

A nonlinear lattice for high-amplitude picosecond pulse generation in CMOS

Wooram Lee
, Muhammad Adnan
, Omeed Momeni
, Ehsan Afshari

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

13 Scopus citations

Abstract

In this paper, we study an electrical nonlinear medium consisting of voltage-dependent capacitors and inductors to generate sharp pulses from a lower frequency sinusoid. First, we analyze the optimum conditions for maximum harmonic generation in a uniform nonlinear line. Next, we extend the nonlinear line to a two-dimensional nonlinear lattice that is compatible with CMOS technology. Compared with the nonlinear line, the lattice relies on spatial power combining, higher cut-off frequency, and nonlinear wave interaction to enhance the pulse amplitude and sharpness. To show the feasibility of this method, we implement the first CMOS nonlinear lattice in a 0.13-μm CMOS process, and successfully demonstrate 2.7-V _pp, 6.3-ps pulses from a 22-GHz input signal.

Original language	English (US)
Article number	6132441
Pages (from-to)	370-380
Number of pages	11
Journal	IEEE Transactions on Microwave Theory and Techniques
Volume	60
Issue number	2
DOIs	https://doi.org/10.1109/TMTT.2011.2178255
State	Published - Feb 2012

All Science Journal Classification (ASJC) codes

Radiation
Condensed Matter Physics
Electrical and Electronic Engineering

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10.1109/TMTT.2011.2178255

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title = "A nonlinear lattice for high-amplitude picosecond pulse generation in CMOS",

abstract = "In this paper, we study an electrical nonlinear medium consisting of voltage-dependent capacitors and inductors to generate sharp pulses from a lower frequency sinusoid. First, we analyze the optimum conditions for maximum harmonic generation in a uniform nonlinear line. Next, we extend the nonlinear line to a two-dimensional nonlinear lattice that is compatible with CMOS technology. Compared with the nonlinear line, the lattice relies on spatial power combining, higher cut-off frequency, and nonlinear wave interaction to enhance the pulse amplitude and sharpness. To show the feasibility of this method, we implement the first CMOS nonlinear lattice in a 0.13-μm CMOS process, and successfully demonstrate 2.7-V pp, 6.3-ps pulses from a 22-GHz input signal.",

author = "Wooram Lee and Muhammad Adnan and Omeed Momeni and Ehsan Afshari",

note = "Funding Information: Manuscript received May 27, 2011; revised November 11, 2011; accepted November 18, 2011. Date of publication January 16, 2012; date of current version February 03, 2012. This work was supported by the C2S2 Focus Center, one of six research centers funded under the Focus Center Research Program (FCRP), a Semiconductor Research Corporation entity. The work of W. Lee is supported by Samsung fellowship and IEEE Solid-State Circuits Society predoctoral fellowship.",

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AU - Adnan, Muhammad

AU - Momeni, Omeed

AU - Afshari, Ehsan

N1 - Funding Information: Manuscript received May 27, 2011; revised November 11, 2011; accepted November 18, 2011. Date of publication January 16, 2012; date of current version February 03, 2012. This work was supported by the C2S2 Focus Center, one of six research centers funded under the Focus Center Research Program (FCRP), a Semiconductor Research Corporation entity. The work of W. Lee is supported by Samsung fellowship and IEEE Solid-State Circuits Society predoctoral fellowship.

PY - 2012/2

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N2 - In this paper, we study an electrical nonlinear medium consisting of voltage-dependent capacitors and inductors to generate sharp pulses from a lower frequency sinusoid. First, we analyze the optimum conditions for maximum harmonic generation in a uniform nonlinear line. Next, we extend the nonlinear line to a two-dimensional nonlinear lattice that is compatible with CMOS technology. Compared with the nonlinear line, the lattice relies on spatial power combining, higher cut-off frequency, and nonlinear wave interaction to enhance the pulse amplitude and sharpness. To show the feasibility of this method, we implement the first CMOS nonlinear lattice in a 0.13-μm CMOS process, and successfully demonstrate 2.7-V pp, 6.3-ps pulses from a 22-GHz input signal.

AB - In this paper, we study an electrical nonlinear medium consisting of voltage-dependent capacitors and inductors to generate sharp pulses from a lower frequency sinusoid. First, we analyze the optimum conditions for maximum harmonic generation in a uniform nonlinear line. Next, we extend the nonlinear line to a two-dimensional nonlinear lattice that is compatible with CMOS technology. Compared with the nonlinear line, the lattice relies on spatial power combining, higher cut-off frequency, and nonlinear wave interaction to enhance the pulse amplitude and sharpness. To show the feasibility of this method, we implement the first CMOS nonlinear lattice in a 0.13-μm CMOS process, and successfully demonstrate 2.7-V pp, 6.3-ps pulses from a 22-GHz input signal.

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A nonlinear lattice for high-amplitude picosecond pulse generation in CMOS

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