TY - GEN
T1 - A novel random jitter algorithm for high speed links
AU - Waltman, Don
AU - Morales, Aldo
AU - Agili, Sedig
PY - 2011
Y1 - 2011
N2 - In this paper, the authors propose an alternative methodology of modeling jitter for high speed communication links through a technique called "Direct Computation of Probabilities". Jitter modeling cannot be expressed through ordinary means for linear time invariant (LTI) systems as timing distortions (jitter) are comprised of numerous components that are neither linear or timeinvariant or even wide-sense stationary. Therefore, special algorithms have been developed to merge and transform these two sets of data, i.e. timing distortion and signal amplitude values, into a set of probability distributions, which are then compared to the output of other analysis techniques such as link analysis and peak distortion analysis.
AB - In this paper, the authors propose an alternative methodology of modeling jitter for high speed communication links through a technique called "Direct Computation of Probabilities". Jitter modeling cannot be expressed through ordinary means for linear time invariant (LTI) systems as timing distortions (jitter) are comprised of numerous components that are neither linear or timeinvariant or even wide-sense stationary. Therefore, special algorithms have been developed to merge and transform these two sets of data, i.e. timing distortion and signal amplitude values, into a set of probability distributions, which are then compared to the output of other analysis techniques such as link analysis and peak distortion analysis.
UR - http://www.scopus.com/inward/record.url?scp=80052398405&partnerID=8YFLogxK
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U2 - 10.1109/ISCE.2011.5973828
DO - 10.1109/ISCE.2011.5973828
M3 - Conference contribution
AN - SCOPUS:80052398405
SN - 9781612848433
T3 - Proceedings of the International Symposium on Consumer Electronics, ISCE
SP - 260
EP - 263
BT - ISCE 2011 - 15th IEEE International Symposium on Consumer Electronics
T2 - 15th IEEE International Symposium on Consumer Electronics, ISCE 2011
Y2 - 14 June 2011 through 17 June 2011
ER -