A Passive Equalizer Design for Shielded Differential Through-Silicon Vias in 3-D IC

Kai Fu; Wen Sheng Zhao; Gaofeng Wang; Madhavan Swaminathan

doi:10.1109/LMWC.2018.2854552

A Passive Equalizer Design for Shielded Differential Through-Silicon Vias in 3-D IC

Kai Fu
, Wen Sheng Zhao
, Gaofeng Wang
, Madhavan Swaminathan

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

14 Scopus citations

Abstract

This letter develops a simplified circuit model for the shielded differential through-silicon vias (SD-TSVs). The model is consisted of four frequency-independent elements and can accurately predict the insertion loss of the SD-TSVs up to 20 GHz. Based on the model, a parallel resistor-capacitor equalizer is proposed. The proposed passive equalizer achieves wide-band equalization and perfect compensation for high-speed differential signaling.

Original language	English (US)
Article number	8418682
Pages (from-to)	768-770
Number of pages	3
Journal	IEEE Microwave and Wireless Components Letters
Volume	28
Issue number	9
DOIs	https://doi.org/10.1109/LMWC.2018.2854552
State	Published - Sep 2018

All Science Journal Classification (ASJC) codes

Condensed Matter Physics
Electrical and Electronic Engineering

Access to Document

10.1109/LMWC.2018.2854552

Cite this

@article{ab53819f29234a4eaa31c945c6cd7758,

title = "A Passive Equalizer Design for Shielded Differential Through-Silicon Vias in 3-D IC",

abstract = "This letter develops a simplified circuit model for the shielded differential through-silicon vias (SD-TSVs). The model is consisted of four frequency-independent elements and can accurately predict the insertion loss of the SD-TSVs up to 20 GHz. Based on the model, a parallel resistor-capacitor equalizer is proposed. The proposed passive equalizer achieves wide-band equalization and perfect compensation for high-speed differential signaling.",

author = "Kai Fu and Zhao, \{Wen Sheng\} and Gaofeng Wang and Madhavan Swaminathan",

note = "Funding Information: Manuscript received June 14, 2018; accepted July 4, 2018. Date of publication July 24, 2018; date of current version September 4, 2018. This work was supported in part by the National Natural Science Foundation of China under Grant 61504033 and Grant 61411136003, in part by the Talent Project of Zhejiang Association for Science and Technology under Grant 2017YCGC012, and in part by the Open Research Fund of Key Lab of Millimeter Waves, Southeast University under Grant K201910. (Corresponding author: Wen-Sheng Zhao.) K. Fu and G. Wang are with the Key Laboratory of RF Circuits and Systems of Ministry of Education, School of Electronics and Information, Hangzhou Dianzi University, Hangzhou 310018, China. Publisher Copyright: {\textcopyright} 2018 IEEE.",

year = "2018",

month = sep,

doi = "10.1109/LMWC.2018.2854552",

language = "English (US)",

volume = "28",

pages = "768--770",

journal = "IEEE Microwave and Wireless Components Letters",

issn = "1531-1309",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "9",

}

TY - JOUR

T1 - A Passive Equalizer Design for Shielded Differential Through-Silicon Vias in 3-D IC

AU - Fu, Kai

AU - Zhao, Wen Sheng

AU - Wang, Gaofeng

AU - Swaminathan, Madhavan

N1 - Funding Information: Manuscript received June 14, 2018; accepted July 4, 2018. Date of publication July 24, 2018; date of current version September 4, 2018. This work was supported in part by the National Natural Science Foundation of China under Grant 61504033 and Grant 61411136003, in part by the Talent Project of Zhejiang Association for Science and Technology under Grant 2017YCGC012, and in part by the Open Research Fund of Key Lab of Millimeter Waves, Southeast University under Grant K201910. (Corresponding author: Wen-Sheng Zhao.) K. Fu and G. Wang are with the Key Laboratory of RF Circuits and Systems of Ministry of Education, School of Electronics and Information, Hangzhou Dianzi University, Hangzhou 310018, China. Publisher Copyright: © 2018 IEEE.

PY - 2018/9

Y1 - 2018/9

N2 - This letter develops a simplified circuit model for the shielded differential through-silicon vias (SD-TSVs). The model is consisted of four frequency-independent elements and can accurately predict the insertion loss of the SD-TSVs up to 20 GHz. Based on the model, a parallel resistor-capacitor equalizer is proposed. The proposed passive equalizer achieves wide-band equalization and perfect compensation for high-speed differential signaling.

AB - This letter develops a simplified circuit model for the shielded differential through-silicon vias (SD-TSVs). The model is consisted of four frequency-independent elements and can accurately predict the insertion loss of the SD-TSVs up to 20 GHz. Based on the model, a parallel resistor-capacitor equalizer is proposed. The proposed passive equalizer achieves wide-band equalization and perfect compensation for high-speed differential signaling.

UR - https://www.scopus.com/pages/publications/85050628529

UR - https://www.scopus.com/pages/publications/85050628529#tab=citedBy

U2 - 10.1109/LMWC.2018.2854552

DO - 10.1109/LMWC.2018.2854552

M3 - Article

AN - SCOPUS:85050628529

SN - 1531-1309

VL - 28

SP - 768

EP - 770

JO - IEEE Microwave and Wireless Components Letters

JF - IEEE Microwave and Wireless Components Letters

IS - 9

M1 - 8418682

ER -

A Passive Equalizer Design for Shielded Differential Through-Silicon Vias in 3-D IC

Abstract

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this