A real time embedded face detector on FPGA

Kevin Irick; Theocharis Theocharides; Vijaykrishnan Narayanan; Mary Jane Irwin

doi:10.1109/ACSSC.2006.354884

A real time embedded face detector on FPGA

Kevin Irick, Theocharis Theocharides, Vijaykrishnan Narayanan, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Scopus citations

Abstract

Intelligent computing systems demand Human Computer Interfaces that detect and recognize the faces of human users at human interaction speeds. A real-time face detector accurately locates human faces in real-time video streams. While software implementations are effective with regards to accuracy and ease of integration, they suffer from low detection throughput on realtime video signals. In this paper we identify benefits and drawbacks of evolving face detection from software to hardware. We illustrate these tradeoffs by detailing the implementation of an Artificial Neural Network face detector on a midsize FPGA. The prototype achieves 94% detection accuracy at real-time detection rates.

Original language	English (US)
Title of host publication	Conference Record of the 40th Asilomar Conference on Signals, Systems and Computers, ACSSC '06
Pages	917-920
Number of pages	4
DOIs	https://doi.org/10.1109/ACSSC.2006.354884
State	Published - 2006
Event	40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06 - Pacific Grove, CA, United States Duration: Oct 29 2006 → Nov 1 2006

Publication series

Name	Conference Record - Asilomar Conference on Signals, Systems and Computers
ISSN (Print)	1058-6393

Other

Other	40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06
Country/Territory	United States
City	Pacific Grove, CA
Period	10/29/06 → 11/1/06

All Science Journal Classification (ASJC) codes

Signal Processing
Computer Networks and Communications

Access to Document

10.1109/ACSSC.2006.354884

Cite this

@inproceedings{ea5643b71cc248f18dd2d68a48add9e2,

title = "A real time embedded face detector on FPGA",

abstract = "Intelligent computing systems demand Human Computer Interfaces that detect and recognize the faces of human users at human interaction speeds. A real-time face detector accurately locates human faces in real-time video streams. While software implementations are effective with regards to accuracy and ease of integration, they suffer from low detection throughput on realtime video signals. In this paper we identify benefits and drawbacks of evolving face detection from software to hardware. We illustrate these tradeoffs by detailing the implementation of an Artificial Neural Network face detector on a midsize FPGA. The prototype achieves 94% detection accuracy at real-time detection rates.",

author = "Kevin Irick and Theocharis Theocharides and Vijaykrishnan Narayanan and Irwin, {Mary Jane}",

year = "2006",

doi = "10.1109/ACSSC.2006.354884",

language = "English (US)",

isbn = "1424407850",

series = "Conference Record - Asilomar Conference on Signals, Systems and Computers",

pages = "917--920",

booktitle = "Conference Record of the 40th Asilomar Conference on Signals, Systems and Computers, ACSSC '06",

note = "40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06 ; Conference date: 29-10-2006 Through 01-11-2006",

}

Irick, K, Theocharides, T, Narayanan, V & Irwin, MJ 2006, A real time embedded face detector on FPGA. in Conference Record of the 40th Asilomar Conference on Signals, Systems and Computers, ACSSC '06., 4176694, Conference Record - Asilomar Conference on Signals, Systems and Computers, pp. 917-920, 40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06, Pacific Grove, CA, United States, 10/29/06. https://doi.org/10.1109/ACSSC.2006.354884

A real time embedded face detector on FPGA. / Irick, Kevin; Theocharides, Theocharis; Narayanan, Vijaykrishnan et al.
Conference Record of the 40th Asilomar Conference on Signals, Systems and Computers, ACSSC '06. 2006. p. 917-920 4176694 (Conference Record - Asilomar Conference on Signals, Systems and Computers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A real time embedded face detector on FPGA

AU - Irick, Kevin

AU - Theocharides, Theocharis

AU - Narayanan, Vijaykrishnan

AU - Irwin, Mary Jane

PY - 2006

Y1 - 2006

N2 - Intelligent computing systems demand Human Computer Interfaces that detect and recognize the faces of human users at human interaction speeds. A real-time face detector accurately locates human faces in real-time video streams. While software implementations are effective with regards to accuracy and ease of integration, they suffer from low detection throughput on realtime video signals. In this paper we identify benefits and drawbacks of evolving face detection from software to hardware. We illustrate these tradeoffs by detailing the implementation of an Artificial Neural Network face detector on a midsize FPGA. The prototype achieves 94% detection accuracy at real-time detection rates.

AB - Intelligent computing systems demand Human Computer Interfaces that detect and recognize the faces of human users at human interaction speeds. A real-time face detector accurately locates human faces in real-time video streams. While software implementations are effective with regards to accuracy and ease of integration, they suffer from low detection throughput on realtime video signals. In this paper we identify benefits and drawbacks of evolving face detection from software to hardware. We illustrate these tradeoffs by detailing the implementation of an Artificial Neural Network face detector on a midsize FPGA. The prototype achieves 94% detection accuracy at real-time detection rates.

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DO - 10.1109/ACSSC.2006.354884

M3 - Conference contribution

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SN - 1424407850

SN - 9781424407859

T3 - Conference Record - Asilomar Conference on Signals, Systems and Computers

SP - 917

EP - 920

BT - Conference Record of the 40th Asilomar Conference on Signals, Systems and Computers, ACSSC '06

T2 - 40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06

Y2 - 29 October 2006 through 1 November 2006

ER -

A real time embedded face detector on FPGA

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