A Solid State Variable Capacitor with Minimum Capacitor

Runruo Chen, Yunting Liu, Fang Zheng Peng

Research output: Contribution to journalArticlepeer-review

30 Scopus citations

Abstract

A solid state variable capacitor (SSVC) with minimum capacitor is proposed. A variable ac capacitor (with capacitance varied from 0 to Cac) is traditionally implemented by an H-bridge inverter and a large electrolytic dc capacitor, whose capacitance is 20 times of the ac capacitor's value, in order to absorb the ripple power pulsating at twice the line frequency (2 υ ripple power). The proposed SSVC system consists of an H-bridge and an additional phase leg connected to an ac capacitor with fixed capacitance Cac and can reduce the dc capacitance to minimum value for absorbing switching ripples. The ac capacitor absorbs the 2υ component and theoretically can eliminate 2υ ripples to the dc capacitor completely. The total capacitor size is reduced by 13 times if same type capacitors (film) are used. Moreover, the proposed SSVC shows special advantages in terms of the switches' current and voltage stress compared to other applications and the total device power rating is only 1.125 times of H-bridge. Since the proposed SSVC only has a small dc capacitor, a novel control system directly based on ripple power is also proposed to achieve stable dc voltage and fast dynamic response. Simulation and experimental results are shown to prove the effectiveness of the proposed SSVC with minimum capacitor.

Original languageEnglish (US)
Article number7565551
Pages (from-to)5035-5044
Number of pages10
JournalIEEE Transactions on Power Electronics
Volume32
Issue number7
DOIs
StatePublished - Jul 2017

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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