Advancing Nonvolatile Computing with Nonvolatile NCFET Latches and Flip-Flops

Xueqing Li; Sumitha George; Kaisheng Ma; Wei Yu Tsai; Ahmedullah Aziz; John Sampson; Sumeet Kumar Gupta; Meng Fan Chang; Yongpan Liu; Suman Datta; Vijaykrishnan Narayanan

doi:10.1109/TCSI.2017.2702741

Advancing Nonvolatile Computing with Nonvolatile NCFET Latches and Flip-Flops

Xueqing Li, Sumitha George, Kaisheng Ma, Wei Yu Tsai, Ahmedullah Aziz, John Sampson, Sumeet Kumar Gupta, Meng Fan Chang, Yongpan Liu, Suman Datta, Vijaykrishnan Narayanan

Research output: Contribution to journal › Article › peer-review

57 Scopus citations

Abstract

Nonvolatile computing has been proven to be effective in dealing with power supply outages for on-chip check-pointing in emerging energy-harvesting Internet-of-Things applications. It also plays an important role in power-gating to cut off leakage power for higher energy efficiency. However, existing on-chip state backup solutions for D flip-flop (DFF) have a bottleneck of significant energy and/or latency penalties which limit the overall energy efficiency and computing progress. Meanwhile, these solutions rely on external control that limits compatibility and increases system complexity. This paper proposes an approach to fundamentally advancing the nonvolatile computing paradigm by intrinsically nonvolatile area-efficient latches and flip-flops designs using negative capacitance FET. These designs consume fJ-level energy and ns-level intrinsic latency for a backup plus restore operation, e.g., 2.4 fJ in energy and 1.1 ns in time for one proposed nonvolatile DFF with a supply power of 0.80 V.

Original language	English (US)
Article number	7938368
Pages (from-to)	2907-2919
Number of pages	13
Journal	IEEE Transactions on Circuits and Systems I: Regular Papers
Volume	64
Issue number	11
DOIs	https://doi.org/10.1109/TCSI.2017.2702741
State	Published - Nov 2017

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/TCSI.2017.2702741

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title = "Advancing Nonvolatile Computing with Nonvolatile NCFET Latches and Flip-Flops",

abstract = "Nonvolatile computing has been proven to be effective in dealing with power supply outages for on-chip check-pointing in emerging energy-harvesting Internet-of-Things applications. It also plays an important role in power-gating to cut off leakage power for higher energy efficiency. However, existing on-chip state backup solutions for D flip-flop (DFF) have a bottleneck of significant energy and/or latency penalties which limit the overall energy efficiency and computing progress. Meanwhile, these solutions rely on external control that limits compatibility and increases system complexity. This paper proposes an approach to fundamentally advancing the nonvolatile computing paradigm by intrinsically nonvolatile area-efficient latches and flip-flops designs using negative capacitance FET. These designs consume fJ-level energy and ns-level intrinsic latency for a backup plus restore operation, e.g., 2.4 fJ in energy and 1.1 ns in time for one proposed nonvolatile DFF with a supply power of 0.80 V.",

author = "Xueqing Li and Sumitha George and Kaisheng Ma and Tsai, {Wei Yu} and Ahmedullah Aziz and John Sampson and Gupta, {Sumeet Kumar} and Chang, {Meng Fan} and Yongpan Liu and Suman Datta and Vijaykrishnan Narayanan",

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AU - George, Sumitha

AU - Ma, Kaisheng

AU - Tsai, Wei Yu

AU - Aziz, Ahmedullah

AU - Sampson, John

AU - Gupta, Sumeet Kumar

AU - Chang, Meng Fan

AU - Liu, Yongpan

AU - Datta, Suman

AU - Narayanan, Vijaykrishnan

PY - 2017/11

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N2 - Nonvolatile computing has been proven to be effective in dealing with power supply outages for on-chip check-pointing in emerging energy-harvesting Internet-of-Things applications. It also plays an important role in power-gating to cut off leakage power for higher energy efficiency. However, existing on-chip state backup solutions for D flip-flop (DFF) have a bottleneck of significant energy and/or latency penalties which limit the overall energy efficiency and computing progress. Meanwhile, these solutions rely on external control that limits compatibility and increases system complexity. This paper proposes an approach to fundamentally advancing the nonvolatile computing paradigm by intrinsically nonvolatile area-efficient latches and flip-flops designs using negative capacitance FET. These designs consume fJ-level energy and ns-level intrinsic latency for a backup plus restore operation, e.g., 2.4 fJ in energy and 1.1 ns in time for one proposed nonvolatile DFF with a supply power of 0.80 V.

AB - Nonvolatile computing has been proven to be effective in dealing with power supply outages for on-chip check-pointing in emerging energy-harvesting Internet-of-Things applications. It also plays an important role in power-gating to cut off leakage power for higher energy efficiency. However, existing on-chip state backup solutions for D flip-flop (DFF) have a bottleneck of significant energy and/or latency penalties which limit the overall energy efficiency and computing progress. Meanwhile, these solutions rely on external control that limits compatibility and increases system complexity. This paper proposes an approach to fundamentally advancing the nonvolatile computing paradigm by intrinsically nonvolatile area-efficient latches and flip-flops designs using negative capacitance FET. These designs consume fJ-level energy and ns-level intrinsic latency for a backup plus restore operation, e.g., 2.4 fJ in energy and 1.1 ns in time for one proposed nonvolatile DFF with a supply power of 0.80 V.

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Advancing Nonvolatile Computing with Nonvolatile NCFET Latches and Flip-Flops

Abstract

All Science Journal Classification (ASJC) codes

UN SDGs

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