Advancing Nonvolatile Computing with Nonvolatile NCFET Latches and Flip-Flops

Xueqing Li, Sumitha George, Kaisheng Ma, Wei Yu Tsai, Ahmedullah Aziz, John Sampson, Sumeet Kumar Gupta, Meng Fan Chang, Yongpan Liu, Suman Datta, Vijaykrishnan Narayanan

Research output: Contribution to journalArticlepeer-review

53 Scopus citations


Nonvolatile computing has been proven to be effective in dealing with power supply outages for on-chip check-pointing in emerging energy-harvesting Internet-of-Things applications. It also plays an important role in power-gating to cut off leakage power for higher energy efficiency. However, existing on-chip state backup solutions for D flip-flop (DFF) have a bottleneck of significant energy and/or latency penalties which limit the overall energy efficiency and computing progress. Meanwhile, these solutions rely on external control that limits compatibility and increases system complexity. This paper proposes an approach to fundamentally advancing the nonvolatile computing paradigm by intrinsically nonvolatile area-efficient latches and flip-flops designs using negative capacitance FET. These designs consume fJ-level energy and ns-level intrinsic latency for a backup plus restore operation, e.g., 2.4 fJ in energy and 1.1 ns in time for one proposed nonvolatile DFF with a supply power of 0.80 V.

Original languageEnglish (US)
Article number7938368
Pages (from-to)2907-2919
Number of pages13
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Issue number11
StatePublished - Nov 2017

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Hardware and Architecture


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