TY - GEN
T1 - (almost) fence-less persist ordering
AU - Shahri, Sara Mahdizadeh
AU - Armin Vakil Ghahani, Seyed
AU - Kolli, Aasheesh
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/10
Y1 - 2020/10
N2 - The semantics and implementation of a memory persistency model can significantly impact the performance achieved on persistent memory systems. The only commercially available and widely used x86 persistency model causes significant performance losses by requiring redundant, expensive fence operations for commonly used undo logging programming patterns. In this work, we propose light-weight extensions to the x86 persistency model to provide some ordering guarantees without an intervening fence operation. Our extension, Themis, eliminates over 91.7% of the fence operations in undo-logging PM programs and improves average performance by 45.8% while incurring only 1.2% increase in data cache size.
AB - The semantics and implementation of a memory persistency model can significantly impact the performance achieved on persistent memory systems. The only commercially available and widely used x86 persistency model causes significant performance losses by requiring redundant, expensive fence operations for commonly used undo logging programming patterns. In this work, we propose light-weight extensions to the x86 persistency model to provide some ordering guarantees without an intervening fence operation. Our extension, Themis, eliminates over 91.7% of the fence operations in undo-logging PM programs and improves average performance by 45.8% while incurring only 1.2% increase in data cache size.
UR - http://www.scopus.com/inward/record.url?scp=85097341735&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85097341735&partnerID=8YFLogxK
U2 - 10.1109/MICRO50266.2020.00052
DO - 10.1109/MICRO50266.2020.00052
M3 - Conference contribution
AN - SCOPUS:85097341735
T3 - Proceedings of the Annual International Symposium on Microarchitecture, MICRO
SP - 539
EP - 554
BT - Proceedings - 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2020
PB - IEEE Computer Society
T2 - 53rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2020
Y2 - 17 October 2020 through 21 October 2020
ER -