An access pattern based energy management strategy for instruction caches

A. Nadgir, Mahmut Kandemir, Guangyu Chen, Guilin Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Increasing leakage energy consumption is an important problem for SOC-based platforms as such platforms rely on large on-chip SRAMs. While most of the previous techniques focus on hardware based leakage optimization, in this paper, we present an application access pattern oriented strategy for reducing instruction cache leakage energy. This strategy keeps track of the dynamic transitions between the procedures of a given application, and tries to keep the cache lines not used by the current procedure in a power-down state as much as possible. Our simulation results indicate significant savings in leakage energy.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International SOC Conference, SOCC 2003
EditorsDong S. Ha, Richard Auletta, John Chickanosky
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages175-178
Number of pages4
ISBN (Electronic)0780381823, 9780780381827
DOIs
StatePublished - Jan 1 2003
EventIEEE International SOC Conference, SOCC 2003 - Portland, United States
Duration: Sep 17 2003Sep 20 2003

Publication series

NameProceedings - IEEE International SOC Conference, SOCC 2003

Other

OtherIEEE International SOC Conference, SOCC 2003
Country/TerritoryUnited States
CityPortland
Period9/17/039/20/03

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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