TY - GEN
T1 - An Adaptive ASIC for Closed-Loop Low-Power Pulse-Based Ultrasonic Data Transmission
AU - Kashani, Zeinab
AU - Kiani, Mehdi
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - Low-power and robust wireless communication is needed in implantable medical devices with the millimeter (mm) dimension, in which power is scarce. This paper presents an adaptive ASIC for low-power (and robust) data transmission from a mm-sized implant to an external unit using optimal number of ultrasonic (US) pulses. Any changes in the distance and alignment of a US transducer pair (for US wireless power and data transfer) can drastically vary the amplitude of the received signal. To mitigate this issue (i.e., improving robustness) and minimize the power consumption of the data transmitter, the number of transmitted US pulses is changed based on the received voltage at the external unit in the proposed closed-loop system. The proposed ASIC, designed and fabricated in a 0.35 \mu \mathrm{m} standard CMOS process, includes a power-management unit for rectification, regulation, and over-voltage protection of a 1.1 MHz US power carrier using only one external capacitor. The ASIC also includes a pulse-based data transmitter that can adaptively generate 1-8 pulses based on the received pattern modulated on the power carrier. Simulation results demonstrate the functionality of the ASIC in wireless power and data transfer with optimal number of pulses in the implant.
AB - Low-power and robust wireless communication is needed in implantable medical devices with the millimeter (mm) dimension, in which power is scarce. This paper presents an adaptive ASIC for low-power (and robust) data transmission from a mm-sized implant to an external unit using optimal number of ultrasonic (US) pulses. Any changes in the distance and alignment of a US transducer pair (for US wireless power and data transfer) can drastically vary the amplitude of the received signal. To mitigate this issue (i.e., improving robustness) and minimize the power consumption of the data transmitter, the number of transmitted US pulses is changed based on the received voltage at the external unit in the proposed closed-loop system. The proposed ASIC, designed and fabricated in a 0.35 \mu \mathrm{m} standard CMOS process, includes a power-management unit for rectification, regulation, and over-voltage protection of a 1.1 MHz US power carrier using only one external capacitor. The ASIC also includes a pulse-based data transmitter that can adaptively generate 1-8 pulses based on the received pattern modulated on the power carrier. Simulation results demonstrate the functionality of the ASIC in wireless power and data transfer with optimal number of pulses in the implant.
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U2 - 10.1109/ISCAS48785.2022.9937874
DO - 10.1109/ISCAS48785.2022.9937874
M3 - Conference contribution
AN - SCOPUS:85142507437
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1763
EP - 1767
BT - IEEE International Symposium on Circuits and Systems, ISCAS 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022
Y2 - 27 May 2022 through 1 June 2022
ER -