TY - GEN
T1 - An analytical power estimation model for crossbar interconnects
AU - Geethanjali, E.
AU - Narayanan, Vijaykrishnan
AU - Irwin, Mary Jane
N1 - Publisher Copyright:
© 2002 IEEE.
PY - 2002
Y1 - 2002
N2 - Low power optimizations have become an integral part of designing computing system. One important part of low power design is accurate and efficient power estimation during the design phase in order to meet the power specifications without a costly redesign process. Power estimation refers to the process of determining with a high level of confidence, the power consumed by a circuit/component. A lot of work has been done to come up with power estimation tools for different components of computing systems. In this work, we look at modeling one such component, The crossbar interconnect.
AB - Low power optimizations have become an integral part of designing computing system. One important part of low power design is accurate and efficient power estimation during the design phase in order to meet the power specifications without a costly redesign process. Power estimation refers to the process of determining with a high level of confidence, the power consumed by a circuit/component. A lot of work has been done to come up with power estimation tools for different components of computing systems. In this work, we look at modeling one such component, The crossbar interconnect.
UR - http://www.scopus.com/inward/record.url?scp=18744391289&partnerID=8YFLogxK
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U2 - 10.1109/ASIC.2002.1158042
DO - 10.1109/ASIC.2002.1158042
M3 - Conference contribution
AN - SCOPUS:18744391289
T3 - Proceedings of the Annual IEEE International ASIC Conference and Exhibit
SP - 119
EP - 123
BT - Proceedings - 15th Annual IEEE International ASIC/SOC Conference, ASIC/SOC 2002
A2 - Chickanosky, John
A2 - Krishnamurthy, Ram K.
A2 - Mukund, P.R.
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 15th Annual IEEE International ASIC/SOC Conference, ASIC/SOC 2002
Y2 - 25 September 2002 through 28 September 2002
ER -