An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1

Tapan Khilnani; Sedig Agili; Aldo Morales; Jeremy Blum; Mike Resso

doi:10.1109/ICCE.2016.7430713

An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1

Tapan Khilnani, Sedig Agili, Aldo Morales, Jeremy Blum, Mike Resso

School of Science, Engineering & Technology (Harrisburg)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A hash map implementation of the link analysis technique for obtaining jitter is proposed, under non-linear receiver conditions. The jitter PDF obtained from the link analysis, which typically assumes an LTI system, is passed through the I/O non-linear CMOS receiver voltage characteristics, obtaining the final jitter distribution. Simulations show promising results.

Original language	English (US)
Title of host publication	2016 IEEE International Conference on Consumer Electronics, ICCE 2016
Editors	Francisco J. Bellido, Daniel Diaz-Sanchez, Nicholas C. H. Vun, Carsten Dolar, Wing-Kuen Ling
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	522-523
Number of pages	2
ISBN (Electronic)	9781467383646
DOIs	https://doi.org/10.1109/ICCE.2016.7430713
State	Published - Mar 10 2016
Event	IEEE International Conference on Consumer Electronics, ICCE 2016 - Las Vegas, United States Duration: Jan 7 2016 → Jan 11 2016

Publication series

Name	2016 IEEE International Conference on Consumer Electronics, ICCE 2016

Other

Other	IEEE International Conference on Consumer Electronics, ICCE 2016
Country/Territory	United States
City	Las Vegas
Period	1/7/16 → 1/11/16

All Science Journal Classification (ASJC) codes

Computer Networks and Communications
Electrical and Electronic Engineering

Access to Document

10.1109/ICCE.2016.7430713

Cite this

Khilnani, T., Agili, S., Morales, A., Blum, J., & Resso, M. (2016). An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1. In F. J. Bellido, D. Diaz-Sanchez, N. C. H. Vun, C. Dolar, & W.-K. Ling (Eds.), 2016 IEEE International Conference on Consumer Electronics, ICCE 2016 (pp. 522-523). Article 7430713 (2016 IEEE International Conference on Consumer Electronics, ICCE 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCE.2016.7430713

Khilnani, Tapan ; Agili, Sedig ; Morales, Aldo et al. / An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1. 2016 IEEE International Conference on Consumer Electronics, ICCE 2016. editor / Francisco J. Bellido ; Daniel Diaz-Sanchez ; Nicholas C. H. Vun ; Carsten Dolar ; Wing-Kuen Ling. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 522-523 (2016 IEEE International Conference on Consumer Electronics, ICCE 2016).

@inproceedings{a1aef796c6084f409b347220e3ddced8,

title = "An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1",

abstract = "A hash map implementation of the link analysis technique for obtaining jitter is proposed, under non-linear receiver conditions. The jitter PDF obtained from the link analysis, which typically assumes an LTI system, is passed through the I/O non-linear CMOS receiver voltage characteristics, obtaining the final jitter distribution. Simulations show promising results.",

author = "Tapan Khilnani and Sedig Agili and Aldo Morales and Jeremy Blum and Mike Resso",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; IEEE International Conference on Consumer Electronics, ICCE 2016 ; Conference date: 07-01-2016 Through 11-01-2016",

year = "2016",

month = mar,

day = "10",

doi = "10.1109/ICCE.2016.7430713",

language = "English (US)",

series = "2016 IEEE International Conference on Consumer Electronics, ICCE 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "522--523",

editor = "Bellido, {Francisco J.} and Daniel Diaz-Sanchez and Vun, {Nicholas C. H.} and Carsten Dolar and Wing-Kuen Ling",

booktitle = "2016 IEEE International Conference on Consumer Electronics, ICCE 2016",

address = "United States",

}

Khilnani, T, Agili, S , Morales, A , Blum, J & Resso, M 2016, An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1. in FJ Bellido, D Diaz-Sanchez, NCH Vun, C Dolar & W-K Ling (eds), 2016 IEEE International Conference on Consumer Electronics, ICCE 2016., 7430713, 2016 IEEE International Conference on Consumer Electronics, ICCE 2016, Institute of Electrical and Electronics Engineers Inc., pp. 522-523, IEEE International Conference on Consumer Electronics, ICCE 2016, Las Vegas, United States, 1/7/16. https://doi.org/10.1109/ICCE.2016.7430713

An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1. / Khilnani, Tapan; Agili, Sedig ; Morales, Aldo et al.
2016 IEEE International Conference on Consumer Electronics, ICCE 2016. ed. / Francisco J. Bellido; Daniel Diaz-Sanchez; Nicholas C. H. Vun; Carsten Dolar; Wing-Kuen Ling. Institute of Electrical and Electronics Engineers Inc., 2016. p. 522-523 7430713 (2016 IEEE International Conference on Consumer Electronics, ICCE 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1

AU - Khilnani, Tapan

AU - Agili, Sedig

AU - Morales, Aldo

AU - Blum, Jeremy

AU - Resso, Mike

PY - 2016/3/10

Y1 - 2016/3/10

N2 - A hash map implementation of the link analysis technique for obtaining jitter is proposed, under non-linear receiver conditions. The jitter PDF obtained from the link analysis, which typically assumes an LTI system, is passed through the I/O non-linear CMOS receiver voltage characteristics, obtaining the final jitter distribution. Simulations show promising results.

AB - A hash map implementation of the link analysis technique for obtaining jitter is proposed, under non-linear receiver conditions. The jitter PDF obtained from the link analysis, which typically assumes an LTI system, is passed through the I/O non-linear CMOS receiver voltage characteristics, obtaining the final jitter distribution. Simulations show promising results.

UR - http://www.scopus.com/inward/record.url?scp=84965165795&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84965165795&partnerID=8YFLogxK

U2 - 10.1109/ICCE.2016.7430713

DO - 10.1109/ICCE.2016.7430713

M3 - Conference contribution

AN - SCOPUS:84965165795

T3 - 2016 IEEE International Conference on Consumer Electronics, ICCE 2016

SP - 522

EP - 523

BT - 2016 IEEE International Conference on Consumer Electronics, ICCE 2016

A2 - Bellido, Francisco J.

A2 - Diaz-Sanchez, Daniel

A2 - Vun, Nicholas C. H.

A2 - Dolar, Carsten

A2 - Ling, Wing-Kuen

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - IEEE International Conference on Consumer Electronics, ICCE 2016

Y2 - 7 January 2016 through 11 January 2016

ER -

Khilnani T, Agili S , Morales A , Blum J, Resso M. An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1. In Bellido FJ, Diaz-Sanchez D, Vun NCH, Dolar C, Ling WK, editors, 2016 IEEE International Conference on Consumer Electronics, ICCE 2016. Institute of Electrical and Electronics Engineers Inc. 2016. p. 522-523. 7430713. (2016 IEEE International Conference on Consumer Electronics, ICCE 2016). doi: 10.1109/ICCE.2016.7430713

An implementation of link analysis jitter algorithm in the presence of receiver non-linearity1

Abstract

Publication series

Other

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this