TY - GEN
T1 - Analysis of charge retention characteristics for metal and semiconductor nanocrystal non-volatile memories
AU - Guan, Weihua
AU - Long, Shibing
AU - Jia, Rui
AU - Liu, Qi
AU - Hu, Yuan
AU - Wang, Qin
AU - Liu, Ming
PY - 2007/12/1
Y1 - 2007/12/1
N2 - A charge retention model for nanocrystal MOSFET memory structure is proposed, taken into account the quantum confinement effect, to account for the better retention characteristics of metal nanocrystal memories over their semiconductor counterparts observed in the experiment. Simulation results are in consistent with experimental data, which confirms the validity of this model. The impact of nanocrystal size, tunneling dielectric material (especially high-Κ dielectrics) and thickness on the retention characteristics are investigated for both of the metal nanocrystal and semiconductor nanocrystal memories.
AB - A charge retention model for nanocrystal MOSFET memory structure is proposed, taken into account the quantum confinement effect, to account for the better retention characteristics of metal nanocrystal memories over their semiconductor counterparts observed in the experiment. Simulation results are in consistent with experimental data, which confirms the validity of this model. The impact of nanocrystal size, tunneling dielectric material (especially high-Κ dielectrics) and thickness on the retention characteristics are investigated for both of the metal nanocrystal and semiconductor nanocrystal memories.
UR - http://www.scopus.com/inward/record.url?scp=43049156179&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=43049156179&partnerID=8YFLogxK
U2 - 10.1109/EDSSC.2007.4450082
DO - 10.1109/EDSSC.2007.4450082
M3 - Conference contribution
AN - SCOPUS:43049156179
SN - 1424406374
SN - 9781424406371
T3 - IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007
SP - 141
EP - 144
BT - IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007
T2 - IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007
Y2 - 20 December 2007 through 22 December 2007
ER -