Analysis of embedded package capacitors for high performance components

Prathap Muthana; Erdem Matoglu; Nam Pham; Daniel N. De Ara-jo; Bhyrav Mutnury; Moises Cases; Madhavan Swaminathan

doi:10.1109/EPEP.2006.321189

Analysis of embedded package capacitors for high performance components

Prathap Muthana, Erdem Matoglu, Nam Pham, Daniel N. De Ara-jo, Bhyrav Mutnury, Moises Cases, Madhavan Swaminathan

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Scopus citations

Abstract

The ever increasing power requirements of processors and application specific integrated circuits (ASICs) impose stringent requirements on the design of Power Distribution Networks (PDNs). This paper highlights a power analysis methodology and discusses the decoupling requirements of high performance components. The advantages of embedded package capacitors in core and I/O decoupling will be highlighted.

Original language	English (US)
Title of host publication	Electrical Performance of Electronic Packaging, EPEP
Pages	55-58
Number of pages	4
DOIs	https://doi.org/10.1109/EPEP.2006.321189
State	Published - 2006
Event	14th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP - Scottsdale, AZ, United States Duration: Oct 23 2006 → Oct 25 2006

Publication series

Name	Electrical Performance of Electronic Packaging, EPEP

Conference

Conference	14th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP
Country/Territory	United States
City	Scottsdale, AZ
Period	10/23/06 → 10/25/06

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/EPEP.2006.321189

Cite this

@inproceedings{0391daa4e42f4b30bf2e043ffbab3108,

title = "Analysis of embedded package capacitors for high performance components",

abstract = "The ever increasing power requirements of processors and application specific integrated circuits (ASICs) impose stringent requirements on the design of Power Distribution Networks (PDNs). This paper highlights a power analysis methodology and discusses the decoupling requirements of high performance components. The advantages of embedded package capacitors in core and I/O decoupling will be highlighted.",

author = "Prathap Muthana and Erdem Matoglu and Nam Pham and {De Ara-jo}, {Daniel N.} and Bhyrav Mutnury and Moises Cases and Madhavan Swaminathan",

year = "2006",

doi = "10.1109/EPEP.2006.321189",

language = "English (US)",

isbn = "1424406684",

series = "Electrical Performance of Electronic Packaging, EPEP",

pages = "55--58",

booktitle = "Electrical Performance of Electronic Packaging, EPEP",

note = "14th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP ; Conference date: 23-10-2006 Through 25-10-2006",

}

Muthana, P, Matoglu, E, Pham, N, De Ara-jo, DN, Mutnury, B, Cases, M & Swaminathan, M 2006, Analysis of embedded package capacitors for high performance components. in Electrical Performance of Electronic Packaging, EPEP., 4115349, Electrical Performance of Electronic Packaging, EPEP, pp. 55-58, 14th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP, Scottsdale, AZ, United States, 10/23/06. https://doi.org/10.1109/EPEP.2006.321189

TY - GEN

T1 - Analysis of embedded package capacitors for high performance components

AU - Muthana, Prathap

AU - Matoglu, Erdem

AU - Pham, Nam

AU - De Ara-jo, Daniel N.

AU - Mutnury, Bhyrav

AU - Cases, Moises

AU - Swaminathan, Madhavan

PY - 2006

Y1 - 2006

N2 - The ever increasing power requirements of processors and application specific integrated circuits (ASICs) impose stringent requirements on the design of Power Distribution Networks (PDNs). This paper highlights a power analysis methodology and discusses the decoupling requirements of high performance components. The advantages of embedded package capacitors in core and I/O decoupling will be highlighted.

AB - The ever increasing power requirements of processors and application specific integrated circuits (ASICs) impose stringent requirements on the design of Power Distribution Networks (PDNs). This paper highlights a power analysis methodology and discusses the decoupling requirements of high performance components. The advantages of embedded package capacitors in core and I/O decoupling will be highlighted.

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U2 - 10.1109/EPEP.2006.321189

DO - 10.1109/EPEP.2006.321189

M3 - Conference contribution

AN - SCOPUS:50049125701

SN - 1424406684

SN - 9781424406685

T3 - Electrical Performance of Electronic Packaging, EPEP

SP - 55

EP - 58

BT - Electrical Performance of Electronic Packaging, EPEP

T2 - 14th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP

Y2 - 23 October 2006 through 25 October 2006

ER -

Analysis of embedded package capacitors for high performance components

Abstract

Publication series

Conference

All Science Journal Classification (ASJC) codes

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