TY - GEN
T1 - Analysis of embedded package capacitors for high performance components
AU - Muthana, Prathap
AU - Matoglu, Erdem
AU - Pham, Nam
AU - De Ara-jo, Daniel N.
AU - Mutnury, Bhyrav
AU - Cases, Moises
AU - Swaminathan, Madhavan
PY - 2006
Y1 - 2006
N2 - The ever increasing power requirements of processors and application specific integrated circuits (ASICs) impose stringent requirements on the design of Power Distribution Networks (PDNs). This paper highlights a power analysis methodology and discusses the decoupling requirements of high performance components. The advantages of embedded package capacitors in core and I/O decoupling will be highlighted.
AB - The ever increasing power requirements of processors and application specific integrated circuits (ASICs) impose stringent requirements on the design of Power Distribution Networks (PDNs). This paper highlights a power analysis methodology and discusses the decoupling requirements of high performance components. The advantages of embedded package capacitors in core and I/O decoupling will be highlighted.
UR - https://www.scopus.com/pages/publications/50049125701
UR - https://www.scopus.com/pages/publications/50049125701#tab=citedBy
U2 - 10.1109/EPEP.2006.321189
DO - 10.1109/EPEP.2006.321189
M3 - Conference contribution
AN - SCOPUS:50049125701
SN - 1424406684
SN - 9781424406685
T3 - Electrical Performance of Electronic Packaging, EPEP
SP - 55
EP - 58
BT - Electrical Performance of Electronic Packaging, EPEP
T2 - 14th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP
Y2 - 23 October 2006 through 25 October 2006
ER -