TY - JOUR
T1 - Analysis of error recovery schemes for networks on chips
AU - Murali, Srinivasan
AU - Theocharides, Theocharis
AU - Vijaykrishnan, N.
AU - Irwin, Mary Jane
AU - Benini, Luca
AU - De Micheli, Giovanni
N1 - Funding Information:
This research is supported by the Marco Gigascale Systems Research Center and the US National Science Foundation under contract CCR-0305718.
PY - 2005/9
Y1 - 2005/9
N2 - Error resiliency is a must for NoCs, but it must not incur undue costs - particularly in terms of energy consumption. Here, the authors present and authoritative discussion of the trade-offs involved in various error recovery schemes, enabling designers to make optimal decisions.
AB - Error resiliency is a must for NoCs, but it must not incur undue costs - particularly in terms of energy consumption. Here, the authors present and authoritative discussion of the trade-offs involved in various error recovery schemes, enabling designers to make optimal decisions.
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U2 - 10.1109/MDT.2005.104
DO - 10.1109/MDT.2005.104
M3 - Article
AN - SCOPUS:27344448860
SN - 0740-7475
VL - 22
SP - 434
EP - 442
JO - IEEE Design and Test of Computers
JF - IEEE Design and Test of Computers
IS - 5
ER -