Abstract
Advanced gate dielectric stacks are comprised of multiple layers of different materials, including high-k gate dielectrics, high-mobility semiconductor channels, metal gate electrodes and interfacial layers with sub-nanometer thickness. The composition, point defect chemistry, interface atomic structure and interaction between the layers determine the properties of novel gate stacks. This paper reviews recent applications of advanced transmission electron microscopy techniques to determine the atomic structure and defects in advanced gate stacks.
Original language | English (US) |
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Title of host publication | 2009 Symposium on VLSI Technology, VLSIT 2009 |
Pages | 198-199 |
Number of pages | 2 |
State | Published - 2009 |
Event | 2009 Symposium on VLSI Technology, VLSIT 2009 - Kyoto, Japan Duration: Jun 16 2009 → Jun 18 2009 |
Other
Other | 2009 Symposium on VLSI Technology, VLSIT 2009 |
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Country/Territory | Japan |
City | Kyoto |
Period | 6/16/09 → 6/18/09 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering