Abstract
Scientific visualization and virtual reality have pushed three-dimensional graphics engines to their limits for updating scenes in real-time. One bottleneck of graphic systems is the transformation of an object's vertices into normalized space based on an evaluated transformation stack. This operation is often done in floating point, requiring a fast floating point multiply-accumulate unit. This paper presents architectural optimizations to a graphics pipeline floating point multiply-accumulate unit by using block floating point and parallelism to bypass or merge trivial operations in the matrix multiplications.
| Original language | English (US) |
|---|---|
| Pages | 65-71 |
| Number of pages | 7 |
| State | Published - Jan 1 1996 |
| Event | Proceedings of the 1996 International Conference on Application-Specific Systems, Architectures and Processors - Chicago, IL, USA Duration: Aug 19 1996 → Aug 21 1996 |
Other
| Other | Proceedings of the 1996 International Conference on Application-Specific Systems, Architectures and Processors |
|---|---|
| City | Chicago, IL, USA |
| Period | 8/19/96 → 8/21/96 |
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Computer Networks and Communications