TY - GEN
T1 - Augmented PEEC for direct time-domain thermal and power estimation of integrated voltage regulator architectures arising in heterogeneous integration
AU - Avula, Venkatesh
AU - Smet, Vanessa
AU - Joshi, Yogendra
AU - Swaminathan, Madhavan
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/10
Y1 - 2020/10
N2 - An enhanced PEEC model for periodic steady-state analysis is presented. It interprets a dynamical domain as a network of linear and switching elements and represents them with their augmented spectral equivalents. Its computational efficiency is verified on the thermal and power delivery analysis of integrated voltage regulator architectures.
AB - An enhanced PEEC model for periodic steady-state analysis is presented. It interprets a dynamical domain as a network of linear and switching elements and represents them with their augmented spectral equivalents. Its computational efficiency is verified on the thermal and power delivery analysis of integrated voltage regulator architectures.
UR - http://www.scopus.com/inward/record.url?scp=85097000452&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85097000452&partnerID=8YFLogxK
U2 - 10.1109/EPEPS48591.2020.9231482
DO - 10.1109/EPEPS48591.2020.9231482
M3 - Conference contribution
AN - SCOPUS:85097000452
T3 - EPEPS 2020 - IEEE 29th Conference on Electrical Performance of Electronic Packaging and Systems
BT - EPEPS 2020 - IEEE 29th Conference on Electrical Performance of Electronic Packaging and Systems
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 29th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2020
Y2 - 5 October 2020 through 7 October 2020
ER -