Abstract
Graphics Processing Units (GPUs) are becoming a de facto choice for accelerating applications from a wide range of domains ranging from graphics to high-performance computing. As a result, it is getting increasingly desirable to improve the cooperation between traditional CPUs and accelerators such as GPUs. However, given the growing security concerns in the CPU space, closer integration of GPUs has further expanded the attack surface. For example, several side-channel attacks have shown that sensitive information can be leaked from the CPU end. In the same vein, several side-channel attacks are also now being developed in the GPU world. Overall, it is challenging to keep emerging CPU-GPU heterogeneous systems secure while maintaining their performance and energy efficiency. In this paper, we focus on developing an efficient defense mechanism for a type of correlation timing attack on GPUs. Such an attack has been shown to recover AES private keys by exploiting the relationship between the number of coalesced memory accesses and total execution time. Prior state-of-the-art defense mechanisms use inefficient randomized coalescing techniques to defend against such GPU attacks and require turning-off bandwidth conserving techniques such as caches and miss-status holding registers (MSHRs) to ensure security. To address these limitations, we propose BCoal - a new bucketing-based coalescing mechanism. BCoal significantly reduces the information leakage by always issuing pre-determined numbers of coalesced accesses (called buckets). With the help of a detailed application-level analysis, BCoal determines the bucket sizes and pads, if necessary, the number of real accesses with additional (padded) accesses to meet the bucket sizes ensuring the security against the correlation timing attack. Furthermore, BCoal generates the padded accesses such that the security is ensured even in the presence of MSHRs and caches. In effect, BCoal significantly improves GPU security at a modest performance loss.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings - 2020 IEEE International Symposium on High Performance Computer Architecture, HPCA 2020 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 570-581 |
| Number of pages | 12 |
| ISBN (Electronic) | 9781728161495 |
| DOIs | |
| State | Published - Feb 2020 |
| Event | 26th IEEE International Symposium on High Performance Computer Architecture, HPCA 2020 - San Diego, United States Duration: Feb 22 2020 → Feb 26 2020 |
Publication series
| Name | Proceedings - 2020 IEEE International Symposium on High Performance Computer Architecture, HPCA 2020 |
|---|
Conference
| Conference | 26th IEEE International Symposium on High Performance Computer Architecture, HPCA 2020 |
|---|---|
| Country/Territory | United States |
| City | San Diego |
| Period | 2/22/20 → 2/26/20 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
-
SDG 7 Affordable and Clean Energy
All Science Journal Classification (ASJC) codes
- Artificial Intelligence
- Hardware and Architecture
- Safety, Risk, Reliability and Quality
Fingerprint
Dive into the research topics of 'BCoal: Bucketing-based memory coalescing for efficient and secure GPUs'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver