BEOL compatible sub-nm diffusion barrier for advanced Cu interconnects

Chun Li Lo, Kehao Zhang, Joshua A. Robinson, Zhihong Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Scopus citations

Abstract

The limit of diffusion barrier/liner thickness scaling is one of the main challenges in modern Cu interconnect technology. Since conventional diffusion barriers are much more resistive than Cu, their thickness needs to be as thin as possible to achieve overall lower line resistance. However, these barrier materials lose their ability to block Cu diffusion when they are extremely scaled, as illustrated in Fig. 1. Therefore, sub-nm barrier is urgently demanded for ultra-scaled interconnects in the near future. To address this issue, 2D layered materials have been proposed and tested as diffusion barrier alternatives because of their atomically thin body thickness. Promising results showing improved interconnect performance have been achieved in these materials (Table I). For example, with a graphene passivation, Cu resistivity at scaled dimensions has been reduced [1] and electromigration can be alleviated [2]. Moreover, studies have shown that 2D layered materials have superior diffusion barrier properties [3]- [6]. Despite the abovementioned benefits of 2D layered materials, a BEOL compatible growth process that can directly deposit on dielectrics and is adaptable to damascene structures still needs to be demonstrated (Fig. 2). In this work, single-layer molybdenum disulfide (1L MoS2; 0.615 nm) directly grown on SiO2 at 400 °C is achieved by metal-organic chemical vapor deposition (MOCVD). We will show that this sub-nm barrier can effectively prevent Cu diffusion, and is able to reduce Cu resistivity.

Original languageEnglish (US)
Title of host publication2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-2
Number of pages2
ISBN (Electronic)9781538648254
DOIs
StatePublished - Jul 3 2018
Event2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018 - Hsinchu, Taiwan, Province of China
Duration: Apr 16 2018Apr 19 2018

Publication series

Name2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018

Other

Other2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018
Country/TerritoryTaiwan, Province of China
CityHsinchu
Period4/16/184/19/18

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Instrumentation
  • Electronic, Optical and Magnetic Materials

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