TY - GEN
T1 - Big data analytics concepts and management techniques
AU - Elarabi, Tarek
AU - Sharma, Bhanu
AU - Pahwa, Karan
AU - Deep, Vishal
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/7/2
Y1 - 2016/7/2
N2 - Emergence of big data sources at a rapid rate extends the necessity of old data organization due to the large volume, velocity, variety, value, and veracity of this data. Performing timely analysis on huge datasets is the central promise of big data analytics. The frameworks used to compose analytics jobs into a Directed Acyclic Graphs of small tasks, and then aggregate the intermediate results from the tasks to obtain the final result, does so with the help of a scheduler and a reliable storage layer that distributes the datasets on different machines. This paper presents the above two aspects, scheduling and storage, describe their key principles, and how these principles are realized in widely-deployed systems. The aim of this research project is to design a novel memory management for in-memory databases. Special designed hardware architectures can support the memory management of the host processor. This paper also explores how special designed hardware architectures can upkeep and fast-track data attainment, data straining and data investigation.
AB - Emergence of big data sources at a rapid rate extends the necessity of old data organization due to the large volume, velocity, variety, value, and veracity of this data. Performing timely analysis on huge datasets is the central promise of big data analytics. The frameworks used to compose analytics jobs into a Directed Acyclic Graphs of small tasks, and then aggregate the intermediate results from the tasks to obtain the final result, does so with the help of a scheduler and a reliable storage layer that distributes the datasets on different machines. This paper presents the above two aspects, scheduling and storage, describe their key principles, and how these principles are realized in widely-deployed systems. The aim of this research project is to design a novel memory management for in-memory databases. Special designed hardware architectures can support the memory management of the host processor. This paper also explores how special designed hardware architectures can upkeep and fast-track data attainment, data straining and data investigation.
UR - http://www.scopus.com/inward/record.url?scp=85011031769&partnerID=8YFLogxK
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U2 - 10.1109/INVENTIVE.2016.7824813
DO - 10.1109/INVENTIVE.2016.7824813
M3 - Conference contribution
AN - SCOPUS:85011031769
T3 - Proceedings of the International Conference on Inventive Computation Technologies, ICICT 2016
BT - Proceedings of the International Conference on Inventive Computation Technologies, ICICT 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 International Conference on Inventive Computation Technologies, ICICT 2016
Y2 - 26 August 2016 through 27 August 2016
ER -