Breakdown in the metal/high-k gate stack: Identifying the "weak link" in the multilayer dielectric

  • G. Bersuker
  • , D. Heh
  • , C. Young
  • , H. Park
  • , P. Khanal
  • , L. Larcher
  • , A. Padovani
  • , P. Lenahan
  • , J. Ryan
  • , B. H. Lee
  • , H. Tseng
  • , R. Jammy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

73 Scopus citations

Abstract

We apply a systematic approach to identify a high- k/metal gate stack degradation mechanism. Our results demonstrate that the SiO 2 interfacial layer controls the overall degradation and breakdown of the high-k gate stacks stressed in inversion. Defects contributing to the gate stack degradation are associated with the high-k/metal-induced oxygen vacancies in the interfacial layer.

Original languageEnglish (US)
Title of host publication2008 IEEE International Electron Devices Meeting, IEDM 2008
DOIs
StatePublished - 2008
Event2008 IEEE International Electron Devices Meeting, IEDM 2008 - San Francisco, CA, United States
Duration: Dec 15 2008Dec 17 2008

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Other

Other2008 IEEE International Electron Devices Meeting, IEDM 2008
Country/TerritoryUnited States
CitySan Francisco, CA
Period12/15/0812/17/08

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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