CMOS-compatible ising machines built using bistable latches coupled through ferroelectric transistor arrays

Antik Mallick, Zijian Zhao, Mohammad Khairul Bashar, Shamiul Alam, Md Mazharul Islam, Yi Xiao, Yixin Xu, Ahmedullah Aziz, Vijaykrishnan Narayanan, Kai Ni, Nikhil Shukla

Research output: Contribution to journalArticlepeer-review

5 Scopus citations

Abstract

Realizing compact and scalable Ising machines that are compatible with CMOS-process technology is crucial to the effectiveness and practicality of using such hardware platforms for accelerating computationally intractable problems. Besides the need for realizing compact Ising spins, the implementation of the coupling network, which describes the spin interaction, is also a potential bottleneck in the scalability of such platforms. Therefore, in this work, we propose an Ising machine platform that exploits the novel behavior of compact bi-stable CMOS-latches (cross-coupled inverters) as classical Ising spins interacting through highly scalable and CMOS-process compatible ferroelectric-HfO2-based Ferroelectric FETs (FeFETs) which act as coupling elements. We experimentally demonstrate the prototype building blocks of this system, and evaluate the scaling behavior of the system using simulations. Our work not only provides a pathway to realizing CMOS-compatible designs but also to overcoming their scaling challenges.

Original languageEnglish (US)
Article number1515
JournalScientific reports
Volume13
Issue number1
DOIs
StatePublished - Dec 2023

All Science Journal Classification (ASJC) codes

  • General

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