TY - JOUR
T1 - CMOS ultrasound transceiver chip for high-resolution ultrasonic imaging systems
AU - Kim, Insoo
AU - Kim, Hyunsoo
AU - Griggio, Flavio
AU - Tutwiler, Richard L.
AU - Jackson, Thomas N.
AU - Trolier-McKinstry, Susan
AU - Choi, Kyusun
N1 - Funding Information:
Manuscript received December 14, 2008; revised February 27, 2009. Current version published September 25, 2009. This work was supported by the National Science Foundation (via the MRSEC), the Materials Research Institute of Penn State, and the Center for Dielectric Studies (via the Ben Franklin Center of Excellence on Piezoelectric Materials and Devices). This paper was recommended by Associate Editor E. Lam.
PY - 2009/10
Y1 - 2009/10
N2 - The proposed CMOS ultrasound transceiver chip will enable the development of portable high resolution, high-frequency ultrasonic imaging systems. The transceiver chip is designed for close-coupled MEMS transducer arrays which operate with a 3.3-V power supply. In addition, a transmit digital beamforming system architecture is supported in this work. A prototype chip containing 16 receive and transmit channels withpreamplifiers, Time-Gain compensation amplifiers, a multiplexed Analog-to-Digital converter with 3 kB of on-chip SRAM, and 50-MHz resolution time delayed excitation pulse generators has been fabricated. By utilizing a shared A/D converter architecture, the number of A/D converter and SRAM is cut down to one, unlike typical digital beamforming systems which need 16 A/D converters for 16 receive channels. The chip was fabricated in a 0.35-μm standard CMOS process. The chip size is 10 mm 2, and its average power consumption in receive mode is approximately 270 mW with a 3.3-V power supply. The transceiver chip specifications and designs are described, as well as measured results of each transceiver component and initial pulse-echo experimental results are presented. Copyright copy; 2009 IEEE.
AB - The proposed CMOS ultrasound transceiver chip will enable the development of portable high resolution, high-frequency ultrasonic imaging systems. The transceiver chip is designed for close-coupled MEMS transducer arrays which operate with a 3.3-V power supply. In addition, a transmit digital beamforming system architecture is supported in this work. A prototype chip containing 16 receive and transmit channels withpreamplifiers, Time-Gain compensation amplifiers, a multiplexed Analog-to-Digital converter with 3 kB of on-chip SRAM, and 50-MHz resolution time delayed excitation pulse generators has been fabricated. By utilizing a shared A/D converter architecture, the number of A/D converter and SRAM is cut down to one, unlike typical digital beamforming systems which need 16 A/D converters for 16 receive channels. The chip was fabricated in a 0.35-μm standard CMOS process. The chip size is 10 mm 2, and its average power consumption in receive mode is approximately 270 mW with a 3.3-V power supply. The transceiver chip specifications and designs are described, as well as measured results of each transceiver component and initial pulse-echo experimental results are presented. Copyright copy; 2009 IEEE.
UR - http://www.scopus.com/inward/record.url?scp=74949135915&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=74949135915&partnerID=8YFLogxK
U2 - 10.1109/TBCAS.2009.2023912
DO - 10.1109/TBCAS.2009.2023912
M3 - Article
C2 - 23853268
AN - SCOPUS:74949135915
SN - 1932-4545
VL - 3
SP - 293
EP - 303
JO - IEEE transactions on biomedical circuits and systems
JF - IEEE transactions on biomedical circuits and systems
IS - 5
ER -