Compatibility of candidate high permittivity gate oxides with front and backend processing conditions

A. I. Kingon, J. P. Maria, D. Wicaksana, C. Hoffman, S. Stemmer

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Scopus citations

Abstract

The need for new, high permittivity dielectrics for gate stacks in CMOS devices is now well recognized. The timescales for the requirements is laid out in recent issues of the Semiconductor Industry Association Roadmap. The most pressing requirement is for low powered MOSFETs. Research into high permittivity candidate dielectrics has therefore proceeded with urgency over the past 3 years. In general, two approaches are possible. Industry would prefer the direct replacement of SiO2 as the gate dielectric, while making relatively few changes to the subsequent process conditions. This would require that the alternative dielectric be capable of surviving the high temperature rapid thermal anneals (typically over 1000°C) required for dopant activation, in addition to the reducing backend anneals used to ensure low contact resistances for the interconnect structures. An alternative approach is to determine optimum process conditions for the gate dielectric, and adapt the CMOS process flow to accommodate this process. Relatively few resources have to date been expended to determine whether direct replacement is a possibility. This question is thus the research topic addressed in this paper. We address the question by establishing the conditions for thermodynamic stability of candidate dielectrics at elevated temperature, and the conditions under which specific reactions occur. We confirmed our reaction models by measuring the properties of appropriate MOS capacitors after high temperature processing.

Original languageEnglish (US)
Title of host publicationExtended Abstracts of International Workshop on Gate Insulator, IWGI 2001
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages36-41
Number of pages6
ISBN (Electronic)4891140216, 9784891140212
DOIs
StatePublished - Jan 1 2001
EventInternational Workshop on Gate Insulator, IWGI 2001 - Tokyo, Japan
Duration: Nov 1 2001Nov 2 2001

Publication series

NameExtended Abstracts of International Workshop on Gate Insulator, IWGI 2001

Other

OtherInternational Workshop on Gate Insulator, IWGI 2001
Country/TerritoryJapan
CityTokyo
Period11/1/0111/2/01

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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