TY - GEN
T1 - Compiler-directed application mapping for NoC based chip multiprocessors
AU - Chen, Guangyu
AU - Li, Feihui
AU - Kandemir, Mahmut
PY - 2007
Y1 - 2007
N2 - The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multi-processor architecture in a locality-aware fashion. The proposed compiler approach has four major steps: task scheduling, processor mapping, data mapping, and packet routing. Our experimental result clearly shows that the proposed framework reduces energy consumption of our applications significantly (27.41% on average over a pure performance oriented application mapping strategy) as a result of improved locality of data accesses.
AB - The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multi-processor architecture in a locality-aware fashion. The proposed compiler approach has four major steps: task scheduling, processor mapping, data mapping, and packet routing. Our experimental result clearly shows that the proposed framework reduces energy consumption of our applications significantly (27.41% on average over a pure performance oriented application mapping strategy) as a result of improved locality of data accesses.
UR - http://www.scopus.com/inward/record.url?scp=34547988700&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34547988700&partnerID=8YFLogxK
U2 - 10.1145/1254766.1254796
DO - 10.1145/1254766.1254796
M3 - Conference contribution
AN - SCOPUS:34547988700
SN - 1595936327
SN - 9781595936325
T3 - Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)
SP - 155
EP - 157
BT - LCTES'07
T2 - LCTES'07: 2007 ACM SIGPLAN-SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems
Y2 - 13 June 2007 through 15 June 2007
ER -