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Compiler-directed channel allocation for saving power in on-chip networks
Guangyu Chen
, Feihui Li
,
Mahmut Kandemir
Institute for Computational and Data Sciences (ICDS)
Computer Science and Engineering
Research output
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Contribution to journal
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Article
›
peer-review
4
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Keyphrases
Energy Saving
100%
Compiler
100%
Compiler-based
100%
Channel Allocation
100%
Network on chip
100%
Unique Characteristics
50%
Hardware Efficiency
50%
Software-based
50%
Embedded Systems
50%
Chip-based
50%
Application Codes
50%
Hardware Complexity
50%
Turn-off
50%
Simulation Environment
50%
Network Architecture
50%
Embedded Applications
50%
Communication Channels
50%
Energy Consumption Reduction
50%
Processing Unit
50%
Hurt
50%
Network Simulation
50%
Increasing Complexity
50%
Communication Patterns
50%
Parallelizing
50%
Multiple Processing
50%
Optimizing Compilers
50%
On-chip Power
50%
Communication Messages
50%
On-chip Communication
50%
Number of Channels
50%
Idle Period
50%
Video Processing
50%
Compiler Technology
50%
Power Saving Mechanism
50%
Communication Latency
50%
Bus-based
50%
Simultaneous Communication
50%
Multiprocessor Network
50%
Embedded Image
50%
Computer Science
Networks on Chips
100%
multi-processor
33%
Application Code
33%
Simulation Environment
33%
Network Architecture
33%
Embedded Application
33%
Network Simulation
33%
Processing Unit
33%
Optimizing Compiler
33%
Intensive Application
33%
Video Processing
33%
Reducing Power Consumption
33%
Communication Latency
33%
Communication Technique
33%
Computer Hardware
33%
Power Management
33%
Embedded System
33%
Communication Process
33%