Compiler-Directed High-Level Energy Estimation and Optimization

I. Kadayif, M. Kandemir, G. Chen, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam

Research output: Contribution to journalArticlepeer-review

14 Scopus citations


The demand for high-performance architectures and powerful battery-operated mobile devices has accentuated the need for power optimization. While many power-oriented hardware optimization techniques have been proposed and incorporated in current systems, the increasingly critical power constraints have made it essential to look for software-level optimizations as well. The compiler can play a pivotal role in addressing the power constraints of a system as it wields a significant influence on the application's runtime behavior. This paper presents a novel Energy-Aware Compilation (EAC) framework that estimates and optimizes energy consumption of a given code, taking as input the architectural and technological parameters, energy models, and energy/performance/code size constraints. The framework has been validated using a cycle-accurate architectural-level energy simulator and found to be within 6% error margin while providing significant estimation speedup. The estimation speed of EAC is the key to the number of optimization alternatives that can be explored within a reasonable compilation time. As shown in this paper, EAC allows compiler writers and system designers to investigate power-performance tradeoffs of traditional compiler optimizations and to develop energy-conscious high-level code transformations.

Original languageEnglish (US)
Pages (from-to)819-850
Number of pages32
JournalACM Transactions on Embedded Computing Systems
Issue number4
StatePublished - Nov 1 2005

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture


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