Compiler-Directed Proactive Power Management for Networks

Keyphrases

• Power Management 100%
• Compiler 100%
• Hardware Efficiency 60%
• Performance Penalty 40%
• Communication Link 40%
• Target Network 40%
• ChIP-chip 20%
• Energy Saving 20%
• Network Performance 20%
• Potential Gains 20%
• Parallel Computing 20%
• Power Consumption 20%
• Idle Time 20%
• Embedded Applications 20%
• Small-sized 20%
• On chip 20%
• Network on chip 20%
• Parallel Architecture 20%
• Power Perspective 20%
• Performance Aspects 20%
• Predicting the Future 20%
• Network Utilization 20%
• Proactive Approach 20%
• Low-power State 20%
• Active Time 20%

Computer Science

• Power Consumption 50%
• Performance Penalty 50%
• Intensive Application 50%
• Communication Link 50%
• Network Performance 25%
• Embedded Application 25%
• Potential Benefit 25%
• Networks on Chips 25%
• Parallel Architectures 25%
• Common Characteristic 25%
• Proactive Approach 25%
• Parallel Computation 25%
• Network Target 25%