Computational model for message-passing

Anand Sivasubramaniam; Umakishore Ramachandran; H. Venkateswaran

Computational model for message-passing

Anand Sivasubramaniam, Umakishore Ramachandran, H. Venkateswaran

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This extended abstract develops a framework for message-passing architectures consisting of a machine model called communicating random access machine (CRAM) and a programming paradigm. The CRAM model would serve as a vehicle for the design and analysis of message-passing algorithms. The message-passing paradigm would make the mapping of algorithms that fit this paradigm onto message-passing architectures more natural. Experimental results from implementing this paradigm on parallel architectures and the performance implications of implementing shared memory algorithms on message-passing architectures may be found in the full version of this paper.

Original language	English (US)
Title of host publication	Proceedings of the International Conference on Parallel Processing
Publisher	Publ by IEEE
Pages	358-361
Number of pages	4
ISBN (Print)	0818626720
State	Published - 1992
Event	Proceedings of the 6th International Parallel Processing Symposium - Beverly Hills, CA, USA Duration: Mar 23 1992 → Mar 26 1992

Other

Other	Proceedings of the 6th International Parallel Processing Symposium
City	Beverly Hills, CA, USA
Period	3/23/92 → 3/26/92

All Science Journal Classification (ASJC) codes

Hardware and Architecture

Cite this

@inproceedings{4c3dc57a87624be1b1f2c1cbc1bae20d,

title = "Computational model for message-passing",

abstract = "This extended abstract develops a framework for message-passing architectures consisting of a machine model called communicating random access machine (CRAM) and a programming paradigm. The CRAM model would serve as a vehicle for the design and analysis of message-passing algorithms. The message-passing paradigm would make the mapping of algorithms that fit this paradigm onto message-passing architectures more natural. Experimental results from implementing this paradigm on parallel architectures and the performance implications of implementing shared memory algorithms on message-passing architectures may be found in the full version of this paper.",

author = "Anand Sivasubramaniam and Umakishore Ramachandran and H. Venkateswaran",

year = "1992",

language = "English (US)",

isbn = "0818626720",

pages = "358--361",

booktitle = "Proceedings of the International Conference on Parallel Processing",

publisher = "Publ by IEEE",

note = "Proceedings of the 6th International Parallel Processing Symposium ; Conference date: 23-03-1992 Through 26-03-1992",

}

TY - GEN

T1 - Computational model for message-passing

AU - Sivasubramaniam, Anand

AU - Ramachandran, Umakishore

AU - Venkateswaran, H.

PY - 1992

Y1 - 1992

N2 - This extended abstract develops a framework for message-passing architectures consisting of a machine model called communicating random access machine (CRAM) and a programming paradigm. The CRAM model would serve as a vehicle for the design and analysis of message-passing algorithms. The message-passing paradigm would make the mapping of algorithms that fit this paradigm onto message-passing architectures more natural. Experimental results from implementing this paradigm on parallel architectures and the performance implications of implementing shared memory algorithms on message-passing architectures may be found in the full version of this paper.

AB - This extended abstract develops a framework for message-passing architectures consisting of a machine model called communicating random access machine (CRAM) and a programming paradigm. The CRAM model would serve as a vehicle for the design and analysis of message-passing algorithms. The message-passing paradigm would make the mapping of algorithms that fit this paradigm onto message-passing architectures more natural. Experimental results from implementing this paradigm on parallel architectures and the performance implications of implementing shared memory algorithms on message-passing architectures may be found in the full version of this paper.

UR - http://www.scopus.com/inward/record.url?scp=0026995140&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0026995140&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0026995140

SN - 0818626720

SP - 358

EP - 361

BT - Proceedings of the International Conference on Parallel Processing

PB - Publ by IEEE

T2 - Proceedings of the 6th International Parallel Processing Symposium

Y2 - 23 March 1992 through 26 March 1992

ER -

Computational model for message-passing

Abstract

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All Science Journal Classification (ASJC) codes

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