Core vs. uncore: The heart of darkness

Hsiang Yun Cheng, Jia Zhan, Jishen Zhao, Yuan Xie, Jack Sampson, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations


Even though Moore's Law continues to provide increasing transistor counts, the rise of the utilization wall limits the number of transistors that can be powered on and results in a large region of dark silicon. Prior studies have proposed energy-efficient core designs to address the "dark silico" problem. Nevertheless, the research for addressing dark silicon challenges in uncore components, such as shared cache, on-chip interconnect, etc, that contribute significant on-chip power consumption is largely unexplored. In this paper, we first illustrate that the power consumption of uncore components cannot be ignored to meet the chip's power constraint. We then introduce techniques to design energy-efficient uncore components, including shared cache and on-chip interconnect. The design challenges and opportunities to exploit 3D techniques and non-volatile memory (NVM) in dark-silicon-aware architecture are also discussed.

Original languageEnglish (US)
Title of host publication2015 ACM/EDAC/IEEE Design Automation Conference, DAC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781450335201
StatePublished - Jun 7 2015
Event52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015 - San Francisco, United States
Duration: Jun 7 2015Jun 11 2015

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X


Other52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015
Country/TerritoryUnited States
CitySan Francisco

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation


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