Correlated material enhanced SRAMs with robust low power operation

We propose a novel static random access memory (SRAM) cell employing correlated material (CM) films in conjunction with the transistors to achieve higher read stability, write ability, and energy efficiency. The design of the proposed SRAM cell utilizes orders of magnitude difference in the resistance of the insulating and metallic phases of the CM to mitigate the design conflicts. By appropriately controlling the phase transitions in the CM films during SRAM operation through device-circuit codesign, we achieve 30% higher read static noise margin and 36% increase in the write margin over standard SRAM. The proposed design also leads to a 50% reduction in the leakage current due to high insulating state of the CM. This is achieved at 28% read time penalty. We also discuss the layout implications of our technique and present techniques to sustain no area overhead.